Searched refs:scd_base_addr (Results 1 – 3 of 3) sorted by relevance
495 trans_pcie->scd_base_addr = in iwl_pcie_tx_start()499 iwl_trans_write_mem(trans, trans_pcie->scd_base_addr + in iwl_pcie_tx_start()1128 tbl_dw_addr = trans_pcie->scd_base_addr + in iwl_pcie_txq_set_ratid_map()1227 iwl_trans_write_mem32(trans, trans_pcie->scd_base_addr + in iwl_trans_pcie_txq_enable()1230 trans_pcie->scd_base_addr + in iwl_trans_pcie_txq_enable()1272 u32 stts_addr = trans_pcie->scd_base_addr + in iwl_trans_pcie_txq_disable()
2129 il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id); in il4965_tx_queue_set_q2ratid()2193 il->scd_base_addr + in il4965_txq_agg_enable()2199 il->scd_base_addr + in il4965_txq_agg_enable()5166 il->scd_base_addr = il_rd_prph(il, IL49_SCD_SRAM_BASE_ADDR); in il4965_alive_notify()5167 a = il->scd_base_addr + IL49_SCD_CONTEXT_DATA_OFFSET; in il4965_alive_notify()5168 for (; a < il->scd_base_addr + IL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4) in il4965_alive_notify()5170 for (; a < il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET; a += 4) in il4965_alive_notify()5174 il->scd_base_addr + in il4965_alive_notify()5205 il->scd_base_addr + in il4965_alive_notify()5213 il->scd_base_addr + in il4965_alive_notify()
1271 u32 scd_base_addr; /* scheduler sram base address */ member