Searched refs:sc_prim_fifo_size_backend (Results 1 – 13 of 13) sorted by relevance
1586 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v6_0_constants_init()1603 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v6_0_constants_init()1620 adev->gfx.config.sc_prim_fifo_size_backend = 0x40; in gfx_v6_0_constants_init()1637 adev->gfx.config.sc_prim_fifo_size_backend = 0x40; in gfx_v6_0_constants_init()1654 adev->gfx.config.sc_prim_fifo_size_backend = 0x40; in gfx_v6_0_constants_init()1735 …(adev->gfx.config.sc_prim_fifo_size_backend << PA_SC_FIFO_SIZE__SC_BACKEND_PRIM_FIFO_SIZE__SHIFT) | in gfx_v6_0_constants_init()
198 unsigned sc_prim_fifo_size_backend; member
1686 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v8_0_gpu_early_init()1703 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v8_0_gpu_early_init()1718 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v8_0_gpu_early_init()1733 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v8_0_gpu_early_init()1750 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v8_0_gpu_early_init()1767 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v8_0_gpu_early_init()1784 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v8_0_gpu_early_init()1801 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v8_0_gpu_early_init()3809 (adev->gfx.config.sc_prim_fifo_size_backend << in gfx_v8_0_constants_init()
1983 …(adev->gfx.config.sc_prim_fifo_size_backend << PA_SC_FIFO_SIZE__SC_BACKEND_PRIM_FIFO_SIZE__SHIFT) | in gfx_v7_0_constants_init()4196 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v7_0_gpu_early_init()4213 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v7_0_gpu_early_init()4230 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v7_0_gpu_early_init()4249 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v7_0_gpu_early_init()
2029 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v9_0_gpu_early_init()2037 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v9_0_gpu_early_init()2047 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v9_0_gpu_early_init()2062 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v9_0_gpu_early_init()2074 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v9_0_gpu_early_init()2084 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v9_0_gpu_early_init()2095 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v9_0_gpu_early_init()
905 config[no_regs++] = adev->gfx.config.sc_prim_fifo_size_backend; in amdgpu_debugfs_gca_config_read()
1073 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v11_0_gpu_early_init()1081 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v11_0_gpu_early_init()1092 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v11_0_gpu_early_init()
4536 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v10_0_gpu_early_init()4551 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v10_0_gpu_early_init()4562 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v10_0_gpu_early_init()
951 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v9_4_3_gpu_early_init()
886 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v12_0_gpu_early_init()
3091 rdev->config.si.sc_prim_fifo_size_backend = 0x100; in si_gpu_init()3108 rdev->config.si.sc_prim_fifo_size_backend = 0x100; in si_gpu_init()3126 rdev->config.si.sc_prim_fifo_size_backend = 0x40; in si_gpu_init()3143 rdev->config.si.sc_prim_fifo_size_backend = 0x40; in si_gpu_init()3160 rdev->config.si.sc_prim_fifo_size_backend = 0x40; in si_gpu_init()3295 SC_BACKEND_PRIM_FIFO_SIZE(rdev->config.si.sc_prim_fifo_size_backend) | in si_gpu_init()
2133 unsigned sc_prim_fifo_size_backend; member2164 unsigned sc_prim_fifo_size_backend; member
3189 rdev->config.cik.sc_prim_fifo_size_backend = 0x100; in cik_gpu_init()3206 rdev->config.cik.sc_prim_fifo_size_backend = 0x100; in cik_gpu_init()3223 rdev->config.cik.sc_prim_fifo_size_backend = 0x100; in cik_gpu_init()3242 rdev->config.cik.sc_prim_fifo_size_backend = 0x100; in cik_gpu_init()3377 SC_BACKEND_PRIM_FIFO_SIZE(rdev->config.cik.sc_prim_fifo_size_backend) | in cik_gpu_init()