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Searched refs:sc_config (Results 1 – 22 of 22) sorted by relevance

/freebsd/sys/dev/etherswitch/ar40xx/
H A Dar40xx_hw.c169 sc->sc_config.switch_cpu_bmp | sc->sc_config.switch_lan_bmp; in ar40xx_hw_vlan_init()
171 sc->sc_config.switch_lan_bmp; in ar40xx_hw_vlan_init()
174 sc->sc_config.switch_cpu_bmp | sc->sc_config.switch_wan_bmp; in ar40xx_hw_vlan_init()
176 sc->sc_config.switch_wan_bmp; in ar40xx_hw_vlan_init()
180 if (sc->sc_config.switch_lan_bmp & (1U << i)) in ar40xx_hw_vlan_init()
182 if (sc->sc_config.switch_wan_bmp & (1U << i)) in ar40xx_hw_vlan_init()
H A Dar40xx_main.c345 &sc->sc_config.switch_mac_mode, in ar40xx_attach()
346 sizeof(sc->sc_config.switch_mac_mode)); in ar40xx_attach()
354 &sc->sc_config.switch_cpu_bmp, in ar40xx_attach()
355 sizeof(sc->sc_config.switch_cpu_bmp)); in ar40xx_attach()
363 &sc->sc_config.switch_lan_bmp, in ar40xx_attach()
364 sizeof(sc->sc_config.switch_lan_bmp)); in ar40xx_attach()
372 &sc->sc_config.switch_wan_bmp, in ar40xx_attach()
373 sizeof(sc->sc_config.switch_wan_bmp)); in ar40xx_attach()
460 sc->sc_config.switch_mac_mode); in ar40xx_attach()
H A Dar40xx_var.h97 } sc_config; member
/freebsd/sys/dev/qcom_ess_edma/
H A Dqcom_ess_edma.c738 sc->sc_config.num_tx_queue_per_cpu = in qcom_ess_edma_attach()
774 sc->sc_config.rx_buf_size = 2048; in qcom_ess_edma_attach()
775 sc->sc_config.rx_buf_ether_align = true; in qcom_ess_edma_attach()
778 sc->sc_config.rss_type = in qcom_ess_edma_attach()
784 sc->sc_config.tx_ring_count = EDMA_TX_RING_SIZE; in qcom_ess_edma_attach()
785 sc->sc_config.rx_ring_count = EDMA_RX_RING_SIZE; in qcom_ess_edma_attach()
788 sc->sc_config.rx_intr_mask = EDMA_RX_IMR_NORMAL_MASK; in qcom_ess_edma_attach()
789 sc->sc_config.tx_intr_mask = EDMA_TX_IMR_NORMAL_MASK; in qcom_ess_edma_attach()
799 &sc->sc_config.num_gmac, sizeof(uint32_t)) > 0) { in qcom_ess_edma_attach()
801 sc->sc_config.num_gmac); in qcom_ess_edma_attach()
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H A Dqcom_ess_edma_hw.c245 sc->sc_config.tx_intr_mask); in qcom_ess_edma_hw_intr_enable()
252 sc->sc_config.rx_intr_mask); in qcom_ess_edma_hw_intr_enable()
567 EDMA_REG_WRITE(sc, EDMA_REG_RSS_TYPE, sc->sc_config.rss_type); in qcom_ess_edma_hw_setup_rx()
627 sc->sc_config.tx_ring_count & EDMA_TPD_RING_SIZE_MASK); in qcom_ess_edma_hw_setup_txrx_desc_rings()
642 len = sc->sc_config.rx_buf_size; in qcom_ess_edma_hw_setup_txrx_desc_rings()
643 if (sc->sc_config.rx_buf_ether_align) in qcom_ess_edma_hw_setup_txrx_desc_rings()
648 reg |= (sc->sc_config.rx_ring_count & EDMA_RFD_RING_SIZE_MASK) in qcom_ess_edma_hw_setup_txrx_desc_rings()
H A Dqcom_ess_edma_rx.c152 m = m_get2(sc->sc_config.rx_buf_size, M_NOWAIT, MT_DATA, M_PKTHDR); in qcom_ess_edma_rx_buf_alloc()
161 m->m_pkthdr.len = m->m_len = sc->sc_config.rx_buf_size; in qcom_ess_edma_rx_buf_alloc()
164 if (sc->sc_config.rx_buf_ether_align) in qcom_ess_edma_rx_buf_alloc()
H A Dqcom_ess_edma_var.h249 } sc_config; member
H A Dqcom_ess_edma_gmac.c204 q = m->m_pkthdr.flowid % sc->sc_config.num_tx_queue_per_cpu; in qcom_ess_edma_gmac_transmit()
/freebsd/sys/dev/safexcel/
H A Dsafexcel.c240 (sc->sc_config.rd_offset * nrdescs * sizeof(uint32_t))); in safexcel_rdr_intr()
321 sc->sc_config.aic_rings = i; in safexcel_configure()
322 if (sc->sc_config.aic_rings == 0) in safexcel_configure()
334 sc->sc_config.hdw = in safexcel_configure()
336 mask = (1 << sc->sc_config.hdw) - 1; in safexcel_configure()
338 sc->sc_config.rings = reg & SAFEXCEL_N_RINGS_MASK; in safexcel_configure()
340 sc->sc_config.rings = MIN(sc->sc_config.rings, sc->sc_config.aic_rings); in safexcel_configure()
342 sc->sc_config.pes = (reg & pemask) >> SAFEXCEL_N_PES_OFFSET; in safexcel_configure()
344 sc->sc_config.cd_size = in safexcel_configure()
346 sc->sc_config.cd_offset = (sc->sc_config.cd_size + mask) & ~mask; in safexcel_configure()
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H A Dsafexcel_var.h419 struct safexcel_config sc_config; member
/titanic_50/usr/src/uts/common/io/wpi/
H A Dwpi.c1262 sc->sc_config.state = 0; in wpi_newstate()
1263 sc->sc_config.filter &= ~LE_32(WPI_FILTER_BSS); in wpi_newstate()
1267 sc->sc_config.chan, sc->sc_config.flags, in wpi_newstate()
1268 sc->sc_config.filter)); in wpi_newstate()
1270 err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config, in wpi_newstate()
1321 sc->sc_config.state = 0; in wpi_newstate()
1322 sc->sc_config.filter &= ~LE_32(WPI_FILTER_BSS); in wpi_newstate()
1350 sc->sc_config.state = LE_16(WPI_CONFIG_ASSOCIATED); in wpi_newstate()
1352 sc->sc_config.flags &= ~LE_32(WPI_CONFIG_SHPREAMBLE | in wpi_newstate()
1355 sc->sc_config.flags |= LE_32(WPI_CONFIG_SHSLOT); in wpi_newstate()
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H A Dwpivar.h170 wpi_config_t sc_config; member
/titanic_50/usr/src/uts/common/io/iwk/
H A Diwk2.c1570 sc->sc_config.assoc_id = 0; in iwk_newstate()
1571 sc->sc_config.filter_flags &= in iwk_newstate()
1575 "flags %x filter_flags %x\n", sc->sc_config.chan, in iwk_newstate()
1576 sc->sc_config.flags, sc->sc_config.filter_flags)); in iwk_newstate()
1578 err = iwk_cmd(sc, REPLY_RXON, &sc->sc_config, in iwk_newstate()
1638 sc->sc_config.assoc_id = 0; in iwk_newstate()
1639 sc->sc_config.filter_flags &= ~LE_32(RXON_FILTER_ASSOC_MSK); in iwk_newstate()
1839 sc->sc_config.filter_flags &= ~LE_32(RXON_FILTER_DIS_DECRYPT_MSK | in iwk_key_set()
2958 (void) memset(&sc->sc_config, 0, sizeof (iwk_rxon_cmd_t)); in iwk_m_ioctl()
2959 IEEE80211_ADDR_COPY(sc->sc_config.node_addr, ic->ic_macaddr); in iwk_m_ioctl()
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H A Diwk2_var.h173 iwk_rxon_cmd_t sc_config; member
/titanic_50/usr/src/uts/common/io/iwh/
H A Diwh.c1880 sc->sc_config.assoc_id = 0; in iwh_newstate()
1881 sc->sc_config.filter_flags &= in iwh_newstate()
1887 LE_16(sc->sc_config.chan), in iwh_newstate()
1888 LE_32(sc->sc_config.flags), in iwh_newstate()
1889 LE_32(sc->sc_config.filter_flags))); in iwh_newstate()
1891 err = iwh_cmd(sc, REPLY_RXON, &sc->sc_config, in iwh_newstate()
1944 sc->sc_config.assoc_id = 0; in iwh_newstate()
1945 sc->sc_config.filter_flags &= ~LE_32(RXON_FILTER_ASSOC_MSK); in iwh_newstate()
3825 bcopy(&sc->sc_config, &sc->sc_config_save, in iwh_thread()
3826 sizeof (sc->sc_config)); in iwh_thread()
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H A Diwh_var.h178 iwh_rxon_cmd_t sc_config; member
/titanic_50/usr/src/uts/common/io/iwp/
H A Diwp.c1816 sc->sc_config.assoc_id = 0; in iwp_newstate()
1817 sc->sc_config.filter_flags &= in iwp_newstate()
1823 LE_16(sc->sc_config.chan), in iwp_newstate()
1824 LE_32(sc->sc_config.flags), in iwp_newstate()
1825 LE_32(sc->sc_config.filter_flags))); in iwp_newstate()
1827 err = iwp_cmd(sc, REPLY_RXON, &sc->sc_config, in iwp_newstate()
1878 sc->sc_config.assoc_id = 0; in iwp_newstate()
1879 sc->sc_config.filter_flags &= ~LE_32(RXON_FILTER_ASSOC_MSK); in iwp_newstate()
3650 bcopy(&sc->sc_config, &sc->sc_config_save, in iwp_thread()
3651 sizeof (sc->sc_config)); in iwp_thread()
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H A Diwp_var.h196 iwp_rxon_cmd_t sc_config; member
/freebsd/sys/dev/usb/input/
H A Dusbhid.c127 struct usb_config sc_config[USBHID_N_TRANSFER]; member
357 sc->sc_config + n, 1, in usbhid_intr_setup()
376 bcopy(usbhid_config, sc->sc_config, sizeof(usbhid_config)); in usbhid_intr_setup()
380 sc->sc_config[USBHID_INTR_OUT_DT].bufsize = rdesc->osize; in usbhid_intr_setup()
381 sc->sc_config[USBHID_INTR_IN_DT].bufsize = rdesc->isize; in usbhid_intr_setup()
382 sc->sc_config[USBHID_CTRL_DT].bufsize = in usbhid_intr_setup()
389 sc->sc_xfer + n, sc->sc_config + n, 1, in usbhid_intr_setup()
517 sc->sc_config[xfer_idx].type != UE_INTERRUPT || in usbhid_sync_xfer()
518 sc->sc_config[xfer_idx].direction != UE_DIR_OUT) in usbhid_sync_xfer()
/titanic_50/usr/src/uts/common/io/arn/
H A Darn_xmit.c1400 if (sc->sc_config.ath_aggr_prot && in ath_buf_set_rate()
1473 if (sc->sc_config.ath_aggr_prot && flags) in ath_buf_set_rate()
1800 if (sc->sc_config.cabqReadytime < ATH9K_READY_TIME_LO_BOUND) in ath_cabq_update()
1801 sc->sc_config.cabqReadytime = ATH9K_READY_TIME_LO_BOUND; in ath_cabq_update()
1802 else if (sc->sc_config.cabqReadytime > ATH9K_READY_TIME_HI_BOUND) in ath_cabq_update()
1803 sc->sc_config.cabqReadytime = ATH9K_READY_TIME_HI_BOUND; in ath_cabq_update()
1807 (conf.beacon_interval * sc->sc_config.cabqReadytime) / 100; in ath_cabq_update()
H A Darn_main.c609 if (sc->sc_curtxpow != sc->sc_config.txpowlimit) { in arn_update_txpow()
610 (void) ath9k_hw_set_txpowerlimit(ah, sc->sc_config.txpowlimit); in arn_update_txpow()
2181 !sc->sc_config.swBeaconProcess) in arn_open()
2987 sc->sc_config.ath_aggr_prot = 0; in arn_attach()
3026 sc->sc_config.cabqReadytime = ATH_CABQ_READY_TIME; in arn_attach()
3098 sc->sc_config.txpowlimit = ATH_TXPOWER_MAX; in arn_attach()
3099 sc->sc_config.txpowlimit_override = 0; in arn_attach()
3136 sc->sc_config.swBeaconProcess = 1; in arn_attach()
H A Darn_core.h848 struct ath_config sc_config; member