| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
| H A D | dcn201_clk_mgr.c | 86 bool safe_to_lower) in dcn201_update_clocks() argument
116 if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) in dcn201_update_clocks()
123 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) in dcn201_update_clocks()
126 if (should_set_clock(safe_to_lower, in dcn201_update_clocks()
130 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) in dcn201_update_clocks()
135 …if (should_update_pstate_support(safe_to_lower, p_state_change_support, clk_mgr_base->clks.p_state… in dcn201_update_clocks()
140 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz)) in dcn201_update_clocks()
143 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn201_update_clocks()
151 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in dcn201_update_clocks()
157 if (dc->config.forced_clocks == false || (force_reset && safe_to_lower)) { in dcn201_update_clocks()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| H A D | dcn20_clk_mgr.h | 31 bool safe_to_lower);
35 bool safe_to_lower);
37 struct dc_state *context, bool safe_to_lower);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.c | 190 bool safe_to_lower, bool disable) in dcn35_disable_otg_wa() argument
203 struct pipe_ctx *pipe = safe_to_lower in dcn35_disable_otg_wa()
295 struct dc_state *context, bool safe_to_lower) in dcn35_update_clocks_update_dpp_dto() argument
324 if (safe_to_lower || prev_dppclk_khz < dppclk_khz) in dcn35_update_clocks_update_dpp_dto()
329 if (safe_to_lower) in dcn35_update_clocks_update_dpp_dto()
356 bool safe_to_lower) in dcn35_notify_host_router_bw() argument
384 …if (should_set_clock(safe_to_lower, new_clocks->host_router_bw_kbps[i], clk_mgr_base->clks.host_ro… in dcn35_notify_host_router_bw()
393 bool safe_to_lower) in dcn35_update_clocks() argument
418 if (safe_to_lower) { in dcn35_update_clocks()
476 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn35_update_clocks()
[all …]
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| H A D | dcn35_clk_mgr.h | 54 bool safe_to_lower);
70 bool safe_to_lower,
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| /linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn201/ |
| H A D | dcn201_hubbub.c | 57 bool safe_to_lower) in hubbub201_program_watermarks() argument
62 if (hubbub1_program_urgent_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub201_program_watermarks()
65 if (hubbub1_program_pstate_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub201_program_watermarks()
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| /linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn21/ |
| H A D | dcn21_hubbub.h | 132 bool safe_to_lower);
137 bool safe_to_lower);
142 bool safe_to_lower);
147 bool safe_to_lower);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| H A D | dcn314_clk_mgr.c | 152 bool safe_to_lower, bool disable) in dcn314_disable_otg_wa() argument
158 struct pipe_ctx *pipe = safe_to_lower in dcn314_disable_otg_wa()
210 bool safe_to_lower) in dcn314_update_clocks() argument
229 if (safe_to_lower) { in dcn314_update_clocks()
275 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn314_update_clocks()
280 if (should_set_clock(safe_to_lower, in dcn314_update_clocks()
290 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn314_update_clocks()
297 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz) && in dcn314_update_clocks()
298 (new_clocks->dispclk_khz > 0 || (safe_to_lower && display_count == 0))) { in dcn314_update_clocks()
301 dcn314_disable_otg_wa(clk_mgr_base, context, safe_to_lower, true); in dcn314_update_clocks()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn32/ |
| H A D | dcn32_hubbub.h | 123 bool safe_to_lower);
129 bool safe_to_lower);
135 bool safe_to_lower);
141 bool safe_to_lower);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| H A D | dcn31_clk_mgr.c | 139 bool safe_to_lower) in dcn31_update_clocks() argument
157 if (safe_to_lower) { in dcn31_update_clocks()
203 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn31_update_clocks()
208 if (should_set_clock(safe_to_lower, in dcn31_update_clocks()
218 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn31_update_clocks()
225 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in dcn31_update_clocks()
237 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn31_update_clocks()
245 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn31_update_clocks()
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| H A D | dcn31_clk_mgr.h | 47 bool safe_to_lower);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| H A D | dcn32_clk_mgr.h | 36 struct dc_state *context, bool safe_to_lower);
|