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Searched refs:rvu_write64 (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_cpt.c108 rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL2(eng), 0x0); in cpt_af_flt_intr_handler()
110 rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL(eng), val & ~1ULL); in cpt_af_flt_intr_handler()
112 rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL2(eng), grp); in cpt_af_flt_intr_handler()
113 rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL(eng), val | 1ULL); in cpt_af_flt_intr_handler()
123 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT(vec), reg); in cpt_af_flt_intr_handler()
153 rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT, reg); in rvu_cpt_af_rvu_intr_handler()
167 rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT, reg); in rvu_cpt_af_ras_intr_handler()
205 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1C(i), in cpt_10k_unregister_interrupts()
209 rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1C, 0x1); in cpt_10k_unregister_interrupts()
210 rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1C, 0x1); in cpt_10k_unregister_interrupts()
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H A Drvu_nix.c276 rvu_write64(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0)); in nix_rx_sync()
287 rvu_write64(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0)); in nix_rx_sync()
614 rvu_write64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v), in nix_bp_disable()
769 rvu_write64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v), in nix_bp_enable()
812 rvu_write64(rvu, blkaddr, in nix_setup_lso_tso_l3()
825 rvu_write64(rvu, blkaddr, in nix_setup_lso_tso_l3()
840 rvu_write64(rvu, blkaddr, in nix_setup_lso_tso_l4()
849 rvu_write64(rvu, blkaddr, in nix_setup_lso_tso_l4()
869 rvu_write64(rvu, blkaddr, NIX_AF_LSO_CFG, cfg | BIT_ULL(63)); in nix_setup_lso()
881 rvu_write64(rvu, blkaddr, in nix_setup_lso()
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H A Drvu_npa.c36 rvu_write64(rvu, block->addr, NPA_AF_AQ_DOOR, 1); in npa_aq_enqueue_wait()
404 rvu_write64(rvu, blkaddr, NPA_AF_LFX_AURAS_CFG(npalf), cfg); in rvu_mbox_handler_npa_lf_alloc()
407 rvu_write64(rvu, blkaddr, NPA_AF_LFX_LOC_AURAS_BASE(npalf), in rvu_mbox_handler_npa_lf_alloc()
411 rvu_write64(rvu, blkaddr, NPA_AF_LFX_QINTS_CFG(npalf), in rvu_mbox_handler_npa_lf_alloc()
413 rvu_write64(rvu, blkaddr, NPA_AF_LFX_QINTS_BASE(npalf), in rvu_mbox_handler_npa_lf_alloc()
476 rvu_write64(rvu, block->addr, NPA_AF_GEN_CFG, cfg); in npa_aq_init()
479 rvu_write64(rvu, block->addr, NPA_AF_GEN_CFG, cfg); in npa_aq_init()
489 rvu_write64(rvu, block->addr, NPA_AF_NDC_CFG, cfg); in npa_aq_init()
496 rvu_write64(rvu, block->addr, NPA_AF_BATCH_CTL, cfg); in npa_aq_init()
508 rvu_write64(rvu, block->addr, NPA_AF_AQ_CFG, AQ_SIZE); in npa_aq_init()
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H A Drvu_cn10k.c43 rvu_write64(rvu, BLKADDR_APR, APR_AF_LMT_CTL, BIT_ULL(0)); in lmtst_map_table_ops()
45 rvu_write64(rvu, BLKADDR_APR, APR_AF_LMT_CTL, 0x00); in lmtst_map_table_ops()
71 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_REQ, iova); in rvu_get_lmtaddr()
75 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TXN_REQ, val); in rvu_get_lmtaddr()
458 rvu_write64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link), cfg); in __rvu_nix_set_channels()
468 rvu_write64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link), cfg); in __rvu_nix_set_channels()
478 rvu_write64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link), cfg); in __rvu_nix_set_channels()
488 rvu_write64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link), cfg); in __rvu_nix_set_channels()
553 rvu_write64(rvu, blkaddr, NIX_AF_VWQE_TIMER, 0x3FULL); in rvu_nix_block_cn10k_init()
560 rvu_write64(rvu, blkaddr, NIX_AF_CFG, cfg); in rvu_nix_block_cn10k_init()
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H A Drvu.c400 rvu_write64(rvu, BLKADDR_RVUM, reg | (devnum << 16), num_lfs); in rvu_update_rsrc_map()
494 rvu_write64(rvu, BLKADDR_RVUM, in rvu_setup_rvum_blk_revid()
501 rvu_write64(rvu, BLKADDR_RVUM, in rvu_clear_rvum_blk_revid()
512 rvu_write64(rvu, block->addr, block->lfreset_reg, lf | BIT_ULL(12)); in rvu_lf_reset()
526 rvu_write64(rvu, blkaddr, rst_reg, BIT_ULL(0)); in rvu_block_reset()
653 rvu_write64(rvu, BLKADDR_RVUM, in rvu_setup_msix_resources()
685 rvu_write64(rvu, BLKADDR_RVUM, in rvu_setup_msix_resources()
709 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_MSIXTR_BASE, (u64)iova); in rvu_setup_msix_resources()
719 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_MSIXTR_BASE, in rvu_reset_msix()
1315 rvu_write64(rvu, block->addr, block->lookup_reg, val); in rvu_lookup_rsrc()
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H A Drvu_npc_hash.h27 rvu_write64(rvu, blkaddr, \
31 rvu_write64(rvu, blkaddr, \
41 rvu_write64(rvu, blkaddr, \
H A Drvu_npc_hash.c210 rvu_write64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY0(intf), in npc_config_secret_key()
212 rvu_write64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY1(intf), in npc_config_secret_key()
214 rvu_write64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY2(intf), in npc_config_secret_key()
617 rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_SECRET0(NIX_INTF_RX), in rvu_exact_config_secret_key()
620 rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_SECRET1(NIX_INTF_RX), in rvu_exact_config_secret_key()
623 rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_SECRET2(NIX_INTF_RX), in rvu_exact_config_secret_key()
659 rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_CFG(NIX_INTF_RX), reg_val); in rvu_exact_config_search_key()
685 rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_RESULT_CTL(NIX_INTF_RX), reg); in rvu_exact_config_result_ctrl()
713 rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_MASK(NIX_INTF_RX), mask); in rvu_exact_config_table_mask()
875 rvu_write64(rvu, blkaddr, NPC_AF_EXACT_MEM_ENTRY(ways, index), mdata); in rvu_npc_exact_mem_table_write()
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H A Dnpc.h14 rvu_write64(rvu, blkaddr, \
18 rvu_write64(rvu, blkaddr, \
H A Drvu.h614 static inline void rvu_write64(struct rvu *rvu, u64 block, u64 offset, u64 val) in rvu_write64() function
639 rvu_write64(rvu, block, offset, val); in rvu_bar2_sel_write64()
H A Drvu_npc_fs.c1329 rvu_write64(rvu, blkaddr, NPC_AF_MATCH_STATX(rule->cntr), req->cntr_val); in npc_install_flow()
1667 rvu_write64(rvu, blkaddr, in npc_mcam_enable_flows()