Home
last modified time | relevance | path

Searched refs:rvu_poll_reg (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/net/ethernet/marvell/octeontx2/af/cn20k/
H A Dmbox_init.c450 err = rvu_poll_reg(rvu, BLKADDR_NIX0, in rvu_alloc_cint_qint_mem()
/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_cn10k.c91 err = rvu_poll_reg(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS, BIT_ULL(0), false); in rvu_get_lmtaddr()
H A Drvu.c99 int rvu_poll_reg(struct rvu *rvu, u64 block, u64 offset, u64 mask, bool zero) in rvu_poll_reg() function
509 err = rvu_poll_reg(rvu, block->addr, block->lfreset_reg, BIT_ULL(12), in rvu_lf_reset()
523 err = rvu_poll_reg(rvu, blkaddr, rst_reg, BIT_ULL(63), true); in rvu_block_reset()
526 while (rvu_poll_reg(rvu, blkaddr, rst_reg, BIT_ULL(63), true) == -EBUSY) in rvu_block_reset()
2110 return rvu_poll_reg(rvu, lfblkaddr, lfoffset, BIT_ULL(12), true); in rvu_ndc_sync()
H A Drvu.h927 int rvu_poll_reg(struct rvu *rvu, u64 block, u64 offset, u64 mask, bool zero);
H A Drvu_nix.c280 err = rvu_poll_reg(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0), true); in nix_rx_sync()
293 err = rvu_poll_reg(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0), true); in nix_rx_sync()
2551 err = rvu_poll_reg(rvu, blkaddr, in nix_smq_flush()
4891 err = rvu_poll_reg(rvu, blkaddr, in nix_calibrate_x2p()