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Searched refs:rtw89_write16_clr (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/net/wireless/realtek/rtw89/
H A Dpci_be.c98 rtw89_write16_clr(rtwdev, R_RAC_DIRECT_OFFSET_BE_LANE0_G2 + in _patch_pre_init_be()
417 rtw89_write16_clr(rtwdev, RAC_DIRECT_OFFESET_L0_G1 + in rtw89_pci_ser_setting_be()
419 rtw89_write16_clr(rtwdev, RAC_DIRECT_OFFESET_L0_G2 + in rtw89_pci_ser_setting_be()
422 rtw89_write16_clr(rtwdev, RAC_DIRECT_OFFESET_L0_G1 + in rtw89_pci_ser_setting_be()
424 rtw89_write16_clr(rtwdev, RAC_DIRECT_OFFESET_L0_G2 + in rtw89_pci_ser_setting_be()
728 rtw89_write16_clr(rtwdev, phy_offset + RAC_ANA19 * RAC_MULT, in rtw89_pci_disable_eq_be()
741 rtw89_write16_clr(rtwdev, phy_offset + RAC_ANA0D * RAC_MULT, in rtw89_pci_disable_eq_be()
754 rtw89_write16_clr(rtwdev, phy_offset + RAC_ANA10 * RAC_MULT, in rtw89_pci_disable_eq_be()
842 rtw89_write16_clr(rtwdev, RAC_DIRECT_OFFESET_L0_G2 + in rtw89_pci_resume_be()
851 rtw89_write16_clr(rtwdev, RAC_DIRECT_OFFESET_L0_G1 + in rtw89_pci_resume_be()
H A Dled.c26 rtw89_write16_clr(rtwdev, e->mode.addr, e->mode.data); in rtw89_led_gpio_config()
34 rtw89_write16_clr(rtwdev, e->mode.addr, e->mode.data); in rtw89_led_gpio_set()
H A Defuse_be.c47 rtw89_write16_clr(rtwdev, R_BE_SYS_ISO_CTRL, B_BE_ISO_EB2CORE); in rtw89_enable_efuse_pwr_cut_ddv_be()
64 rtw89_write16_clr(rtwdev, R_BE_SYS_ISO_CTRL, B_BE_PWC_EV2EF_B); in rtw89_disable_efuse_pwr_cut_ddv_be()
66 rtw89_write16_clr(rtwdev, R_BE_SYS_ISO_CTRL, B_BE_PWC_EV2EF_S); in rtw89_disable_efuse_pwr_cut_ddv_be()
H A Dpci.c2566 rtw89_write16_clr(rtwdev, R_RAC_DIRECT_OFFSET_G1 + RAC_ANA24 * 2, in rtw89_pci_deglitch_setting()
2568 rtw89_write16_clr(rtwdev, R_RAC_DIRECT_OFFSET_G2 + RAC_ANA24 * 2, in rtw89_pci_deglitch_setting()
2624 rtw89_write16_clr(rtwdev, phy_offset + RAC_ANA19 * RAC_MULT, in rtw89_pci_disable_eq_ax()
2637 rtw89_write16_clr(rtwdev, phy_offset + RAC_ANA0D * RAC_MULT, in rtw89_pci_disable_eq_ax()
H A Dmac.h1290 rtw89_write16_clr(rtwdev, reg, bit); in rtw89_write16_port_clr()
H A Dmac.c6469 rtw89_write16_clr(rtwdev, R_AX_CCA_CFG_0, B_AX_BTCCA_BRK_TXOP_EN); in rtw89_mac_coex_init_v1()
7189 rtw89_write16_clr(rtwdev, reg, set); in rtw89_mac_set_hw_muedca_ctrl()
H A Dcore.h8167 rtw89_write16_clr(struct rtw89_dev *rtwdev, u32 addr, u16 bit) in rtw89_write16_clr() function