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Searched refs:rtw89_read32_mask (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/net/wireless/realtek/rtw89/
H A Dps.c49 ret = read_poll_timeout_atomic(rtw89_read32_mask, polling, !polling, in rtw89_fw_leave_lps_check()
H A Dmac.h1111 return rtw89_read32_mask(rtwdev, reg, mask); in rtw89_read32_port_mask()
1481 val = rtw89_read32_mask(rtwdev, R_AX_IC_PWR_STATE, in rtw89_mac_get_power_state()
H A Dpci_be.c398 val = rtw89_read32_mask(rtwdev, R_BE_IC_PWR_STATE, B_BE_WLMAC_PWR_STE_MASK); in rtw89_pci_ops_mac_pre_deinit_be()
H A Dmac.c1373 if (rtw89_read32_mask(rtwdev, R_AX_LDM, B_AX_EN_32K)) in rtw89_mac_check_cpwm_state()
1450 boot_mode = rtw89_read32_mask(rtwdev, R_AX_GPIO_MUXCFG, B_AX_BOOT_MODE); in rtw89_mac_power_switch_boot_mode()
1483 val = rtw89_read32_mask(rtwdev, R_AX_IC_PWR_STATE, B_AX_WLMAC_PWR_STE_MASK); in rtw89_mac_power_switch()
2442 val = rtw89_read32_mask(rtwdev, R_AX_SEC_ENG_CTRL, in scheduler_init_ax()
2692 ret = read_poll_timeout_atomic(rtw89_read32_mask, val32, val32 == 0, in rst_bacam()
4222 ret = read_poll_timeout(rtw89_read32_mask, val, val == 0, 1000, 100000, in rtw89_mac_check_packet_ctrl()
6249 cnt = rtw89_read32_mask(rtwdev, reg, B_AX_BT_PLT_PKT_CNT_MASK); in rtw89_mac_get_plt_cnt_ax()
6667 *tx_time = rtw89_read32_mask(rtwdev, reg, mac->agg_limit.mask) << 5; in rtw89_mac_get_tx_time()
6710 *tx_retry = rtw89_read32_mask(rtwdev, reg, mac->txcnt_limit.mask); in rtw89_mac_get_tx_retry_limit()
H A Dphy.h621 return rtw89_read32_mask(rtwdev, addr + phy->cr_base, mask); in rtw89_phy_read32_mask()
H A Dmac_be.c1089 ret = read_poll_timeout_atomic(rtw89_read32_mask, val, val == S_BE_BACAM_RST_DONE, in rst_bacam_be()
1914 cnt = rtw89_read32_mask(rtwdev, reg, B_BE_BT_PLT_PKT_CNT_MASK); in rtw89_mac_get_plt_cnt_be()
H A Drtw8852c.c216 val32 = rtw89_read32_mask(rtwdev, R_AX_SYS_STATUS1, B_AX_PAD_HCI_SEL_V2_MASK); in rtw8852c_pwr_on_func()
H A Dpci.c3841 val = rtw89_read32_mask(rtwdev, R_AX_PCIE_MIX_CFG_V1, B_AX_ASPM_CTRL_MASK); in rtw89_pci_filter_out()
H A Ddebug.c3387 val32 = rtw89_read32_mask(rtwdev, in rtw89_debug_mac_dbg_port_dump()
H A Dcore.c5352 cv = rtw89_read32_mask(rtwdev, R_AX_SYS_CFG1, B_AX_CHIP_VER_MASK); in rtw89_read_chip_ver()
H A Dcore.h6415 rtw89_read32_mask(struct rtw89_dev *rtwdev, u32 addr, u32 mask) in rtw89_read32_mask() function
H A Dphy.c4376 return (u8)rtw89_read32_mask(rtwdev, xtal->xcap_reg, reg_mask); in rtw89_phy_cfo_get_xcap_reg()