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Searched refs:rst_mask (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/pmdomain/imx/
H A Dimx8m-blk-ctrl.c46 u32 rst_mask; member
101 regmap_clear_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask); in imx8m_blk_ctrl_power_on()
124 regmap_set_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask); in imx8m_blk_ctrl_power_on()
155 regmap_clear_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask); in imx8m_blk_ctrl_power_off()
456 .rst_mask = BIT(1),
464 .rst_mask = BIT(0),
472 .rst_mask = BIT(2),
490 .rst_mask = BIT(1),
500 .rst_mask = BIT(0),
510 .rst_mask = BIT(2),
[all …]
/linux/sound/soc/fsl/
H A Dfsl_mqs.c59 int rst_mask; member
355 .rst_mask = MQS_SW_RST_MASK,
368 .rst_mask = IMX6SX_GPR2_MQS_SW_RST_MASK,
381 .rst_mask = BIT(2),
395 .rst_mask = BIT(2),
408 .rst_mask = BIT(3),
422 .rst_mask = BIT(2),
436 .rst_mask = BIT(2),
/linux/drivers/soc/dove/
H A Dpmu.c123 u32 rst_mask; member
162 if (pmu_dom->rst_mask) { in pmu_domain_power_off()
163 val = ~pmu_dom->rst_mask; in pmu_domain_power_off()
193 if (pmu_dom->rst_mask) { in pmu_domain_power_on()
194 val = pmu_dom->rst_mask; in pmu_domain_power_on()
331 domain->rst_mask = domain_initdata->rst_mask; in dove_init_pmu_legacy()
436 domain->rst_mask = BIT(args.args[0]); in dove_init_pmu()
/linux/drivers/media/pci/mantis/
H A Dhopper_cards.c57 u32 rst_stat = 0, rst_mask = 0; in hopper_irq_handler() local
72 rst_mask = MANTIS_GPIF_WRACK | in hopper_irq_handler()
78 rst_stat &= rst_mask; in hopper_irq_handler()
H A Dmantis_cards.c66 u32 rst_stat = 0, rst_mask = 0; in mantis_irq_handler() local
81 rst_mask = MANTIS_GPIF_WRACK | in mantis_irq_handler()
87 rst_stat &= rst_mask; in mantis_irq_handler()
/linux/include/linux/soc/dove/
H A Dpmu.h9 u32 rst_mask; member
/linux/arch/arm/mach-dove/
H A Dcommon.c394 .rst_mask = PMU_SW_RST_VIDEO_MASK,
399 .rst_mask = PMU_SW_RST_GPU_MASK,
/linux/drivers/clk/mmp/
H A Dclk-apmu.c21 u32 rst_mask; member
/linux/drivers/net/ethernet/mediatek/
H A Dmtk_eth_soc.c3988 u32 rst_mask, val; in mtk_hw_warm_reset() local
4000 rst_mask = RSTCTRL_ETH | RSTCTRL_PPE0_V3; in mtk_hw_warm_reset()
4002 rst_mask |= RSTCTRL_PPE1_V3; in mtk_hw_warm_reset()
4004 rst_mask |= RSTCTRL_PPE2; in mtk_hw_warm_reset()
4006 rst_mask |= RSTCTRL_WDMA0 | RSTCTRL_WDMA1 | RSTCTRL_WDMA2; in mtk_hw_warm_reset()
4008 rst_mask = RSTCTRL_ETH | RSTCTRL_PPE0_V2; in mtk_hw_warm_reset()
4010 rst_mask |= RSTCTRL_PPE1; in mtk_hw_warm_reset()
4012 rst_mask = RSTCTRL_ETH | RSTCTRL_PPE0; in mtk_hw_warm_reset()
4015 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, rst_mask, rst_mask); in mtk_hw_warm_reset()
4019 if (!(val & rst_mask)) in mtk_hw_warm_reset()
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