Searched refs:rlc_hdr (Results 1 – 8 of 8) sorted by relevance
284 const struct rlc_firmware_header_v2_0 *rlc_hdr; in amdgpu_gfx_rlc_init_microcode_v2_0() local289 rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; in amdgpu_gfx_rlc_init_microcode_v2_0()291 adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version); in amdgpu_gfx_rlc_init_microcode_v2_0()292 adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version); in amdgpu_gfx_rlc_init_microcode_v2_0()294 le32_to_cpu(rlc_hdr->save_and_restore_offset); in amdgpu_gfx_rlc_init_microcode_v2_0()296 le32_to_cpu(rlc_hdr->clear_state_descriptor_offset); in amdgpu_gfx_rlc_init_microcode_v2_0()298 le32_to_cpu(rlc_hdr->avail_scratch_ram_locations); in amdgpu_gfx_rlc_init_microcode_v2_0()300 le32_to_cpu(rlc_hdr->reg_restore_list_size); in amdgpu_gfx_rlc_init_microcode_v2_0()302 le32_to_cpu(rlc_hdr->reg_list_format_start); in amdgpu_gfx_rlc_init_microcode_v2_0()304 le32_to_cpu(rlc_hdr->reg_list_format_separate_start); in amdgpu_gfx_rlc_init_microcode_v2_0()[all …]
140 const struct rlc_firmware_header_v1_0 *rlc_hdr = in amdgpu_ucode_print_rlc_hdr() local144 le32_to_cpu(rlc_hdr->ucode_feature_version)); in amdgpu_ucode_print_rlc_hdr()146 le32_to_cpu(rlc_hdr->save_and_restore_offset)); in amdgpu_ucode_print_rlc_hdr()148 le32_to_cpu(rlc_hdr->clear_state_descriptor_offset)); in amdgpu_ucode_print_rlc_hdr()150 le32_to_cpu(rlc_hdr->avail_scratch_ram_locations)); in amdgpu_ucode_print_rlc_hdr()152 le32_to_cpu(rlc_hdr->master_pkt_description_offset)); in amdgpu_ucode_print_rlc_hdr()154 const struct rlc_firmware_header_v2_0 *rlc_hdr = in amdgpu_ucode_print_rlc_hdr() local157 container_of(rlc_hdr, struct rlc_firmware_header_v2_1, v2_0); in amdgpu_ucode_print_rlc_hdr()169 le32_to_cpu(rlc_hdr->ucode_feature_version)); in amdgpu_ucode_print_rlc_hdr()170 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(rlc_hdr->jt_offset)); in amdgpu_ucode_print_rlc_hdr()[all …]
946 const struct rlc_firmware_header_v2_0 *rlc_hdr; in gfx_v8_0_init_microcode() local1050 rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; in gfx_v8_0_init_microcode()1051 adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version); in gfx_v8_0_init_microcode()1052 adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version); in gfx_v8_0_init_microcode()1055 le32_to_cpu(rlc_hdr->save_and_restore_offset); in gfx_v8_0_init_microcode()1057 le32_to_cpu(rlc_hdr->clear_state_descriptor_offset); in gfx_v8_0_init_microcode()1059 le32_to_cpu(rlc_hdr->avail_scratch_ram_locations); in gfx_v8_0_init_microcode()1061 le32_to_cpu(rlc_hdr->reg_restore_list_size); in gfx_v8_0_init_microcode()1063 le32_to_cpu(rlc_hdr->reg_list_format_start); in gfx_v8_0_init_microcode()1065 le32_to_cpu(rlc_hdr->reg_list_format_separate_start); in gfx_v8_0_init_microcode()[all …]
560 const struct rlc_firmware_header_v2_0 *rlc_hdr; in gfx_v12_0_init_microcode() local587 rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; in gfx_v12_0_init_microcode()588 version_major = le16_to_cpu(rlc_hdr->header.header_version_major); in gfx_v12_0_init_microcode()589 version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor); in gfx_v12_0_init_microcode()1079 const struct rlc_firmware_header_v2_0 *rlc_hdr; in gfx_v12_0_rlc_backdoor_autoload_copy_gfx_ucode() local1141 rlc_hdr = (const struct rlc_firmware_header_v2_0 *) in gfx_v12_0_rlc_backdoor_autoload_copy_gfx_ucode()1144 le32_to_cpu(rlc_hdr->header.ucode_array_offset_bytes)); in gfx_v12_0_rlc_backdoor_autoload_copy_gfx_ucode()1145 fw_size = le32_to_cpu(rlc_hdr->header.ucode_size_bytes); in gfx_v12_0_rlc_backdoor_autoload_copy_gfx_ucode()1149 version_major = le16_to_cpu(rlc_hdr->header.header_version_major); in gfx_v12_0_rlc_backdoor_autoload_copy_gfx_ucode()1150 version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor); in gfx_v12_0_rlc_backdoor_autoload_copy_gfx_ucode()
683 const struct rlc_firmware_header_v2_0 *rlc_hdr; in gfx_v11_0_init_microcode() local729 rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; in gfx_v11_0_init_microcode()730 version_major = le16_to_cpu(rlc_hdr->header.header_version_major); in gfx_v11_0_init_microcode()731 version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor); in gfx_v11_0_init_microcode()1284 const struct rlc_firmware_header_v2_0 *rlc_hdr; in gfx_v11_0_rlc_backdoor_autoload_copy_gfx_ucode() local1375 rlc_hdr = (const struct rlc_firmware_header_v2_0 *) in gfx_v11_0_rlc_backdoor_autoload_copy_gfx_ucode()1378 le32_to_cpu(rlc_hdr->header.ucode_array_offset_bytes)); in gfx_v11_0_rlc_backdoor_autoload_copy_gfx_ucode()1379 fw_size = le32_to_cpu(rlc_hdr->header.ucode_size_bytes); in gfx_v11_0_rlc_backdoor_autoload_copy_gfx_ucode()1383 version_major = le16_to_cpu(rlc_hdr->header.header_version_major); in gfx_v11_0_rlc_backdoor_autoload_copy_gfx_ucode()1384 version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor); in gfx_v11_0_rlc_backdoor_autoload_copy_gfx_ucode()
4129 const struct rlc_firmware_header_v2_0 *rlc_hdr; in gfx_v10_0_init_microcode() local4167 rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; in gfx_v10_0_init_microcode()4168 version_major = le16_to_cpu(rlc_hdr->header.header_version_major); in gfx_v10_0_init_microcode()4169 version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor); in gfx_v10_0_init_microcode()5627 const struct rlc_firmware_header_v2_0 *rlc_hdr; in gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode() local5660 rlc_hdr = (const struct rlc_firmware_header_v2_0 *) in gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode()5663 le32_to_cpu(rlc_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode()5664 fw_size = le32_to_cpu(rlc_hdr->header.ucode_size_bytes); in gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode()
1462 const struct rlc_firmware_header_v2_0 *rlc_hdr; in gfx_v9_0_init_rlc_microcode() local1493 rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; in gfx_v9_0_init_rlc_microcode()1494 version_major = le16_to_cpu(rlc_hdr->header.header_version_major); in gfx_v9_0_init_rlc_microcode()1495 version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor); in gfx_v9_0_init_rlc_microcode()
115 const struct rlc_firmware_header_v1_0 *rlc_hdr = in radeon_ucode_print_rlc_hdr() local119 le32_to_cpu(rlc_hdr->ucode_feature_version)); in radeon_ucode_print_rlc_hdr()121 le32_to_cpu(rlc_hdr->save_and_restore_offset)); in radeon_ucode_print_rlc_hdr()123 le32_to_cpu(rlc_hdr->clear_state_descriptor_offset)); in radeon_ucode_print_rlc_hdr()125 le32_to_cpu(rlc_hdr->avail_scratch_ram_locations)); in radeon_ucode_print_rlc_hdr()127 le32_to_cpu(rlc_hdr->master_pkt_description_offset)); in radeon_ucode_print_rlc_hdr()