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Searched refs:rlc (Results 1 – 19 of 19) sorted by relevance

/linux/fs/ntfs/
H A Drunlist.c1667 struct runlist_element *rlc; in ntfs_rl_sparse() local
1672 for (rlc = rl; rlc->length; rlc++) in ntfs_rl_sparse()
1673 if (rlc->lcn < 0) { in ntfs_rl_sparse()
1674 if (rlc->lcn != LCN_HOLE && rlc->lcn != LCN_DELALLOC) { in ntfs_rl_sparse()
1692 struct runlist_element *rlc; in ntfs_rl_get_compressed_size() local
1698 for (rlc = rl; rlc->length; rlc++) { in ntfs_rl_get_compressed_size()
1699 if (rlc->lcn < 0) { in ntfs_rl_get_compressed_size()
1700 if (rlc->lcn != LCN_HOLE && rlc->lcn != LCN_DELALLOC) { in ntfs_rl_get_compressed_size()
1702 __func__, rlc->lcn); in ntfs_rl_get_compressed_size()
1706 ret += rlc->length; in ntfs_rl_get_compressed_size()
H A Dcompress.c1332 struct runlist_element *rlc, *rl; in ntfs_write_cb() local
1406 rlc = ntfs_cluster_alloc(vol, new_vcn, new_length, -1, DATA_ZONE, in ntfs_write_cb()
1408 if (IS_ERR(rlc)) { in ntfs_write_cb()
1409 err = PTR_ERR(rlc); in ntfs_write_cb()
1413 bio_lcn = rlc->lcn; in ntfs_write_cb()
1441 rl = ntfs_runlists_merge(&ni->runlist, rlc, 0, &new_rl_count); in ntfs_write_cb()
1451 rlc = NULL; in ntfs_write_cb()
1460 if (ntfs_cluster_free_from_rl(vol, rlc)) in ntfs_write_cb()
1462 kvfree(rlc); in ntfs_write_cb()
H A Dattrib.c5136 struct runlist_element *rl, *rlc; in ntfs_attr_map_cluster() local
5192 rlc = rl; in ntfs_attr_map_cluster()
5193 while (rlc->vcn) { in ntfs_attr_map_cluster()
5194 rlc--; in ntfs_attr_map_cluster()
5195 if (rlc->lcn >= 0) { in ntfs_attr_map_cluster()
5203 lcn_seek_from = rlc->lcn + rlc->length; in ntfs_attr_map_cluster()
5205 lcn_seek_from = rlc->lcn + (vcn - rlc->vcn); in ntfs_attr_map_cluster()
5212 rlc = rl; in ntfs_attr_map_cluster()
5213 while (rlc->length) { in ntfs_attr_map_cluster()
5214 rlc++; in ntfs_attr_map_cluster()
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/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v8_0.c936 kfree(adev->gfx.rlc.register_list_format); in gfx_v8_0_free_microcode()
1065 adev->gfx.rlc.save_and_restore_offset = in gfx_v8_0_init_microcode()
1067 adev->gfx.rlc.clear_state_descriptor_offset = in gfx_v8_0_init_microcode()
1069 adev->gfx.rlc.avail_scratch_ram_locations = in gfx_v8_0_init_microcode()
1071 adev->gfx.rlc.reg_restore_list_size = in gfx_v8_0_init_microcode()
1073 adev->gfx.rlc.reg_list_format_start = in gfx_v8_0_init_microcode()
1075 adev->gfx.rlc.reg_list_format_separate_start = in gfx_v8_0_init_microcode()
1077 adev->gfx.rlc.starting_offsets_start = in gfx_v8_0_init_microcode()
1079 adev->gfx.rlc.reg_list_format_size_bytes = in gfx_v8_0_init_microcode()
1081 adev->gfx.rlc.reg_list_size_bytes = in gfx_v8_0_init_microcode()
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H A Dgfx_v12_1.c494 kfree(adev->gfx.rlc.register_list_format); in gfx_v12_1_free_microcode()
611 if (adev->gfx.rlc.cs_data == NULL) in gfx_v12_1_get_csb_buffer()
618 for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { in gfx_v12_1_get_csb_buffer()
638 amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, in gfx_v12_1_rlc_fini()
639 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v12_1_rlc_fini()
640 (void **)&adev->gfx.rlc.cs_ptr); in gfx_v12_1_rlc_fini()
643 amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, in gfx_v12_1_rlc_fini()
644 &adev->gfx.rlc.cp_table_gpu_addr, in gfx_v12_1_rlc_fini()
645 (void **)&adev->gfx.rlc.cp_table_ptr); in gfx_v12_1_rlc_fini()
655 reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl[GET_INST(GC, xcc_id)]; in gfx_v12_1_init_rlcg_reg_access_ctrl()
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H A Dgfx_v9_0.c1290 kfree(adev->gfx.rlc.register_list_format); in gfx_v9_0_free_microcode()
1436 !adev->gfx.rlc.is_rlc_v2_1)) in gfx_v9_0_check_if_need_gfxoff()
1656 if (adev->gfx.rlc.cs_data == NULL) in gfx_v9_0_get_csb_buffer()
1825 reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl[0]; in gfx_v9_0_init_rlcg_reg_access_ctrl()
1833 adev->gfx.rlc.rlcg_reg_access_supported = true; in gfx_v9_0_init_rlcg_reg_access_ctrl()
1841 adev->gfx.rlc.cs_data = gfx9_cs_data; in gfx_v9_0_rlc_init()
1843 cs_data = adev->gfx.rlc.cs_data; in gfx_v9_0_rlc_init()
1854 adev->gfx.rlc.cp_table_size = ALIGN(96 * 5 * 4, 2048) + (64 * 1024); /* JT + GDS */ in gfx_v9_0_rlc_init()
2317 if (adev->gfx.rlc.funcs) { in gfx_v9_0_sw_init()
2318 if (adev->gfx.rlc.funcs->init) { in gfx_v9_0_sw_init()
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H A Dgfx_v12_0.c563 kfree(adev->gfx.rlc.register_list_format); in gfx_v12_0_free_microcode()
702 if (adev->gfx.rlc.cs_data == NULL) in gfx_v12_0_get_csb_buffer()
709 for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { in gfx_v12_0_get_csb_buffer()
729 amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, in gfx_v12_0_rlc_fini()
730 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v12_0_rlc_fini()
731 (void **)&adev->gfx.rlc.cs_ptr); in gfx_v12_0_rlc_fini()
734 amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, in gfx_v12_0_rlc_fini()
735 &adev->gfx.rlc.cp_table_gpu_addr, in gfx_v12_0_rlc_fini()
736 (void **)&adev->gfx.rlc.cp_table_ptr); in gfx_v12_0_rlc_fini()
743 reg_access_ctrl = &adev->gfx.rlc in gfx_v12_0_init_rlcg_reg_access_ctrl()
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H A Dgfx_v11_0.c691 kfree(adev->gfx.rlc.register_list_format); in gfx_v11_0_free_microcode()
881 if (adev->gfx.rlc.cs_data == NULL) in gfx_v11_0_get_csb_buffer()
900 amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, in gfx_v11_0_rlc_fini()
901 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v11_0_rlc_fini()
902 (void **)&adev->gfx.rlc.cs_ptr); in gfx_v11_0_rlc_fini()
905 amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, in gfx_v11_0_rlc_fini()
906 &adev->gfx.rlc.cp_table_gpu_addr, in gfx_v11_0_rlc_fini()
907 (void **)&adev->gfx.rlc.cp_table_ptr); in gfx_v11_0_rlc_fini()
914 reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl[0]; in gfx_v11_0_init_rlcg_reg_access_ctrl()
922 adev->gfx.rlc in gfx_v11_0_init_rlcg_reg_access_ctrl()
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H A Dgfx_v10_0.c4137 kfree(adev->gfx.rlc.register_list_format); in gfx_v10_0_free_microcode()
4330 if (adev->gfx.rlc.cs_data == NULL) in gfx_v10_0_get_csb_buffer()
4349 amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, in gfx_v10_0_rlc_fini()
4350 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v10_0_rlc_fini()
4351 (void **)&adev->gfx.rlc.cs_ptr); in gfx_v10_0_rlc_fini()
4354 amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, in gfx_v10_0_rlc_fini()
4355 &adev->gfx.rlc.cp_table_gpu_addr, in gfx_v10_0_rlc_fini()
4356 (void **)&adev->gfx.rlc.cp_table_ptr); in gfx_v10_0_rlc_fini()
4363 reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl[0]; in gfx_v10_0_init_rlcg_reg_access_ctrl()
4380 adev->gfx.rlc.rlcg_reg_access_supported = true; in gfx_v10_0_init_rlcg_reg_access_ctrl()
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H A Dgfx_v9_4_3.c530 kfree(adev->gfx.rlc.register_list_format); in gfx_v9_4_3_free_microcode()
1027 r = adev->gfx.rlc.funcs->init(adev); in gfx_v9_4_3_sw_init()
1139 amdgpu_bo_unref(&adev->gfx.rlc.clear_state_obj); in gfx_v9_4_3_sw_fini()
1377 reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl[GET_INST(GC, xcc_id)]; in gfx_v9_4_3_init_rlcg_reg_access_ctrl()
1386 adev->gfx.rlc.rlcg_reg_access_supported = true; in gfx_v9_4_3_init_rlcg_reg_access_ctrl()
1392 if (adev->gfx.rlc.funcs->update_spm_vmid) in gfx_v9_4_3_rlc_init()
1393 adev->gfx.rlc.funcs->update_spm_vmid(adev, 0, NULL, 0xf); in gfx_v9_4_3_rlc_init()
2359 r = adev->gfx.rlc.funcs->resume(adev); in gfx_v9_4_3_hw_init()
2569 adev->gfx.rlc.funcs->stop(adev); in gfx_v9_4_3_soft_reset()
4081 adev->gfx.rlc.funcs = &gfx_v9_4_3_rlc_funcs; in gfx_v9_4_3_set_rlc_funcs()
H A Damdgpu_virt.c1439 if (!adev->gfx.rlc.rlcg_reg_access_supported) { in amdgpu_virt_rlcg_vfi_reg_rw()
1452 reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl[xcc_id]; in amdgpu_virt_rlcg_vfi_reg_rw()
1560 if (!adev->gfx.rlc.rlcg_reg_access_supported) { in amdgpu_virt_rlcg_reg_rw()
1574 reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl[xcc_id]; in amdgpu_virt_rlcg_reg_rw()
H A Damdgpu_ib.c243 adev->gfx.rlc.funcs->update_spm_vmid(adev, ring->xcc_id, ring, job->vmid); in amdgpu_ib_schedule()
H A Damdgpu_vm.c785 bool spm_update_needed = adev->gfx.rlc.funcs->update_spm_vmid && in amdgpu_vm_flush()
810 spm_update_needed &= !!adev->gfx.rlc.funcs->update_spm_vmid; in amdgpu_vm_flush()
868 adev->gfx.rlc.funcs->update_spm_vmid(adev, ring->xcc_id, ring, job->vmid); in amdgpu_vm_flush()
H A Damdgpu_gfx.c2877 for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { in amdgpu_gfx_csb_data_parser()
/linux/drivers/gpu/drm/radeon/
H A Dradeon_ucode.h215 struct rlc_firmware_header_v1_0 rlc; member
H A Dni.c2164 rdev->rlc.reg_list = tn_rlc_save_restore_register_list; in cayman_startup()
2165 rdev->rlc.reg_list_size = in cayman_startup()
2167 rdev->rlc.cs_data = cayman_cs_data; in cayman_startup()
/linux/arch/arc/lib/
H A Dstrcmp.S77 rlc r0,0 ; r0 := r2 > r3 ? 1 : 0
/linux/drivers/media/test-drivers/vicodec/
H A Dcodec-fwht.c55 rlc(const s16 *in, __be16 *output, int blocktype) in rlc() function
732 size = rlc(cf->coeffs, *rlco, blocktype); in encode_plane()
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/tests/
H A Damdgpu_dm_plane_test.c1334 adev->gfx.rlc.reg_funcs = &dm_test_gfx11_reg_funcs; in dm_test_setup_gfx11_device()