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Searched refs:ring_enc (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0.c219 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_sw_init()
241 amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]); in vcn_v4_0_sw_init()
333 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_hw_init()
344 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_hw_init()
1094 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v4_0_start_dpg_mode()
1281 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_start()
1314 …4_0_init_ring_metadata(struct amdgpu_device *adev, uint32_t vcn_inst, struct amdgpu_ring *ring_enc) in vcn_v4_0_init_ring_metadata() argument
1317 uint8_t *rb_ptr = (uint8_t *)ring_enc->ring; in vcn_v4_0_init_ring_metadata()
1319 rb_ptr += ring_enc->ring_size; in vcn_v4_0_init_ring_metadata()
1335 struct amdgpu_ring *ring_enc; in vcn_v4_0_start_sriov() local
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H A Dvcn_v5_0_1.c121 amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]); in vcn_v5_0_1_late_init()
189 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_1_sw_init()
279 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_1_hw_init_inst()
309 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_1_hw_init()
319 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_1_hw_init()
750 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v5_0_1_start_dpg_mode()
785 struct amdgpu_ring *ring_enc; in vcn_v5_0_1_start_sriov() local
892 ring_enc = &adev->vcn.inst[vcn_inst].ring_enc[0]; in vcn_v5_0_1_start_sriov()
893 ring_enc->wptr = 0; in vcn_v5_0_1_start_sriov()
894 rb_enc_addr = ring_enc->gpu_addr; in vcn_v5_0_1_start_sriov()
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H A Dvcn_v5_0_2.c128 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_2_sw_init()
147 amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]); in vcn_v5_0_2_sw_init()
210 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_2_hw_init()
646 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v5_0_2_start_dpg_mode()
792 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_2_start()
944 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v5_0_2_unified_ring_get_rptr()
961 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v5_0_2_unified_ring_get_wptr()
981 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v5_0_2_unified_ring_set_wptr()
1036 adev->vcn.inst[i].ring_enc[0].funcs = &vcn_v5_0_2_unified_ring_vm_funcs; in vcn_v5_0_2_set_unified_ring_funcs()
1037 adev->vcn.inst[i].ring_enc[0].me = i; in vcn_v5_0_2_set_unified_ring_funcs()
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H A Dvcn_v4_0_3.c157 amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]); in vcn_v4_0_3_late_init()
218 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_sw_init()
317 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v4_0_3_hw_init_inst()
354 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_hw_init()
369 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_hw_init()
970 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v4_0_3_start_dpg_mode()
1014 struct amdgpu_ring *ring_enc; in vcn_v4_0_3_start_sriov() local
1121 ring_enc = &adev->vcn.inst[vcn_inst].ring_enc[0]; in vcn_v4_0_3_start_sriov()
1122 ring_enc->wptr = 0; in vcn_v4_0_3_start_sriov()
1123 rb_enc_addr = ring_enc->gpu_addr; in vcn_v4_0_3_start_sriov()
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H A Dvcn_v2_5.c127 fence[i] += amdgpu_fence_count_emitted(&v->ring_enc[j]); in vcn_v2_5_idle_work_handler()
187 fences += amdgpu_fence_count_emitted(&v->ring_enc[i]); in vcn_v2_5_ring_begin_use()
355 ring = &adev->vcn.inst[j].ring_enc[i]; in vcn_v2_5_sw_init()
387 amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]); in vcn_v2_5_sw_init()
472 adev->vcn.inst[j].ring_enc[0].sched.ready = true; in vcn_v2_5_hw_init()
473 adev->vcn.inst[j].ring_enc[1].sched.ready = false; in vcn_v2_5_hw_init()
474 adev->vcn.inst[j].ring_enc[2].sched.ready = false; in vcn_v2_5_hw_init()
488 ring = &adev->vcn.inst[j].ring_enc[i]; in vcn_v2_5_hw_init()
1321 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v2_5_start()
1330 ring = &adev->vcn.inst[i].ring_enc[1]; in vcn_v2_5_start()
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H A Dvcn_v2_0.c201 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v2_0_sw_init()
219 amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]); in vcn_v2_0_sw_init()
303 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v2_0_hw_init()
1155 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v2_0_start()
1164 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v2_0_start()
1327 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v2_0_pause_dpg_mode()
1337 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v2_0_pause_dpg_mode()
1654 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v2_0_enc_ring_get_rptr()
1671 if (ring == &adev->vcn.inst->ring_enc[0]) { in vcn_v2_0_enc_ring_get_wptr()
1695 if (ring == &adev->vcn.inst->ring_enc[0]) { in vcn_v2_0_enc_ring_set_wptr()
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H A Dvcn_v5_0_0.c161 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_0_sw_init()
189 amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]); in vcn_v5_0_0_sw_init()
262 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_0_hw_init()
764 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v5_0_0_start_dpg_mode()
922 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_0_start()
1140 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v5_0_0_unified_ring_get_rptr()
1157 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v5_0_0_unified_ring_get_wptr()
1177 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v5_0_0_unified_ring_set_wptr()
1252 adev->vcn.inst[i].ring_enc[0].funcs = &vcn_v5_0_0_unified_ring_vm_funcs; in vcn_v5_0_0_set_unified_ring_funcs()
1253 adev->vcn.inst[i].ring_enc[0].me = i; in vcn_v5_0_0_set_unified_ring_funcs()
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H A Dvcn_v3_0.c259 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_sw_init()
295 amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]); in vcn_v3_0_sw_init()
394 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_hw_init()
422 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_hw_init()
1359 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v3_0_start()
1368 ring = &adev->vcn.inst[i].ring_enc[1]; in vcn_v3_0_start()
1495 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_start_sriov()
1754 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v3_0_pause_dpg_mode()
1764 ring = &adev->vcn.inst[inst_idx].ring_enc[1]; in vcn_v3_0_pause_dpg_mode()
2083 if (ring == &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v3_0_enc_ring_get_rptr()
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H A Dvcn_v4_0_5.c181 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_5_sw_init()
219 adev->vcn.supported_reset = amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]); in vcn_v4_0_5_sw_init()
298 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_5_hw_init()
1007 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v4_0_5_start_dpg_mode()
1194 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_5_start()
1416 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v4_0_5_unified_ring_get_rptr()
1433 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v4_0_5_unified_ring_get_wptr()
1453 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v4_0_5_unified_ring_set_wptr()
1531 adev->vcn.inst[i].ring_enc[0].funcs = &vcn_v4_0_5_unified_ring_vm_funcs; in vcn_v4_0_5_set_unified_ring_funcs()
1532 adev->vcn.inst[i].ring_enc[0].me = i; in vcn_v4_0_5_set_unified_ring_funcs()
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H A Damdgpu_vcn.c286 amdgpu_ring_fini(&adev->vcn.inst[i].ring_enc[j]); in amdgpu_vcn_sw_fini()
474 fence[i] += amdgpu_fence_count_emitted(&vcn_inst->ring_enc[j]); in amdgpu_vcn_idle_work_handler()
529 fences += amdgpu_fence_count_emitted(&vcn_inst->ring_enc[i]); in amdgpu_vcn_ring_begin_use()
1416 ring = &adev->vcn.inst[i].ring_enc[0]; in amdgpu_debugfs_vcn_sched_mask_set()
1437 ring = &adev->vcn.inst[i].ring_enc[0]; in amdgpu_debugfs_vcn_sched_mask_get()
1508 drm_sched_wqueue_stop(&vinst->ring_enc[i].sched); in amdgpu_vcn_reset_engine()
1518 r = amdgpu_ring_test_ring(&vinst->ring_enc[i]); in amdgpu_vcn_reset_engine()
1524 amdgpu_fence_driver_force_completion(&vinst->ring_enc[i]); in amdgpu_vcn_reset_engine()
1532 drm_sched_wqueue_start(&vinst->ring_enc[i].sched); in amdgpu_vcn_reset_engine()
H A Damdgpu_uvd.h46 struct amdgpu_ring ring_enc[AMDGPU_MAX_UVD_ENC_RINGS]; member
H A Damdgpu_kms.c522 if (adev->uvd.inst[i].ring_enc[j].sched.ready && in amdgpu_hw_ip_info()
523 !adev->uvd.inst[i].ring_enc[j].no_user_submission) in amdgpu_hw_ip_info()
549 if (adev->vcn.inst[i].ring_enc[j].sched.ready && in amdgpu_hw_ip_info()
550 !adev->vcn.inst[i].ring_enc[j].no_user_submission) in amdgpu_hw_ip_info()