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Searched refs:ring_enc (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0.c211 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_sw_init()
316 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_hw_init()
327 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_hw_init()
1049 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v4_0_start_dpg_mode()
1232 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_start()
1261 …4_0_init_ring_metadata(struct amdgpu_device *adev, uint32_t vcn_inst, struct amdgpu_ring *ring_enc) in vcn_v4_0_init_ring_metadata() argument
1264 uint8_t *rb_ptr = (uint8_t *)ring_enc->ring; in vcn_v4_0_init_ring_metadata()
1266 rb_ptr += ring_enc->ring_size; in vcn_v4_0_init_ring_metadata()
1282 struct amdgpu_ring *ring_enc; in vcn_v4_0_start_sriov() local
1399 ring_enc = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_start_sriov()
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H A Duvd_v7_0.c89 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) in uvd_v7_0_enc_ring_get_rptr()
123 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) in uvd_v7_0_enc_ring_get_wptr()
161 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) in uvd_v7_0_enc_ring_set_wptr()
457 ring = &adev->uvd.inst[j].ring_enc[i]; in uvd_v7_0_sw_init()
505 amdgpu_ring_fini(&adev->uvd.inst[j].ring_enc[i]); in uvd_v7_0_sw_fini()
575 ring = &adev->uvd.inst[j].ring_enc[i]; in uvd_v7_0_hw_init()
761 WDOORBELL32(adev->uvd.inst[i].ring_enc[0].doorbell_index, 0); in uvd_v7_0_mmsch_start()
762 *adev->uvd.inst[i].ring_enc[0].wptr_cpu_addr = 0; in uvd_v7_0_mmsch_start()
763 adev->uvd.inst[i].ring_enc[0].wptr = 0; in uvd_v7_0_mmsch_start()
764 adev->uvd.inst[i].ring_enc[0].wptr_old = 0; in uvd_v7_0_mmsch_start()
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H A Dvcn_v4_0_3.c155 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_sw_init()
268 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_hw_init()
277 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_hw_init()
862 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v4_0_3_start_dpg_mode()
898 struct amdgpu_ring *ring_enc; in vcn_v4_0_3_start_sriov() local
1003 ring_enc = &adev->vcn.inst[vcn_inst].ring_enc[0]; in vcn_v4_0_3_start_sriov()
1004 ring_enc->wptr = 0; in vcn_v4_0_3_start_sriov()
1005 rb_enc_addr = ring_enc->gpu_addr; in vcn_v4_0_3_start_sriov()
1010 rb_setup->rb_size = ring_enc->ring_size / 4; in vcn_v4_0_3_start_sriov()
1225 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_start()
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H A Duvd_v6_0.c95 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_get_rptr()
125 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_get_wptr()
156 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_set_wptr()
404 adev->uvd.inst->ring_enc[i].funcs = NULL; in uvd_v6_0_sw_init()
425 ring = &adev->uvd.inst->ring_enc[i]; in uvd_v6_0_sw_init()
449 amdgpu_ring_fini(&adev->uvd.inst->ring_enc[i]); in uvd_v6_0_sw_fini()
506 ring = &adev->uvd.inst->ring_enc[i]; in uvd_v6_0_hw_init()
867 ring = &adev->uvd.inst->ring_enc[0]; in uvd_v6_0_start()
874 ring = &adev->uvd.inst->ring_enc[1]; in uvd_v6_0_start()
1263 amdgpu_fence_process(&adev->uvd.inst->ring_enc[0]); in uvd_v6_0_process_interrupt()
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H A Dvcn_v2_0.c199 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v2_0_sw_init()
296 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v2_0_hw_init()
1127 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v2_0_start()
1136 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v2_0_start()
1280 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v2_0_pause_dpg_mode()
1290 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v2_0_pause_dpg_mode()
1597 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v2_0_enc_ring_get_rptr()
1614 if (ring == &adev->vcn.inst->ring_enc[0]) { in vcn_v2_0_enc_ring_get_wptr()
1638 if (ring == &adev->vcn.inst->ring_enc[0]) { in vcn_v2_0_enc_ring_set_wptr()
1754 amdgpu_fence_process(&adev->vcn.inst->ring_enc[0]); in vcn_v2_0_process_interrupt()
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H A Dvcn_v2_5.c243 ring = &adev->vcn.inst[j].ring_enc[i]; in vcn_v2_5_sw_init()
354 adev->vcn.inst[j].ring_enc[0].sched.ready = true; in vcn_v2_5_hw_init()
355 adev->vcn.inst[j].ring_enc[1].sched.ready = false; in vcn_v2_5_hw_init()
356 adev->vcn.inst[j].ring_enc[2].sched.ready = false; in vcn_v2_5_hw_init()
370 ring = &adev->vcn.inst[j].ring_enc[i]; in vcn_v2_5_hw_init()
1183 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v2_5_start()
1192 ring = &adev->vcn.inst[i].ring_enc[1]; in vcn_v2_5_start()
1353 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v2_5_sriov_start()
1533 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v2_5_pause_dpg_mode()
1543 ring = &adev->vcn.inst[inst_idx].ring_enc[1]; in vcn_v2_5_pause_dpg_mode()
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H A Dvcn_v5_0_0.c153 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_0_sw_init()
242 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_0_hw_init()
723 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v5_0_0_start_dpg_mode()
877 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_0_start()
1077 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v5_0_0_unified_ring_get_rptr()
1094 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v5_0_0_unified_ring_get_wptr()
1114 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v5_0_0_unified_ring_set_wptr()
1169 adev->vcn.inst[i].ring_enc[0].funcs = &vcn_v5_0_0_unified_ring_vm_funcs; in vcn_v5_0_0_set_unified_ring_funcs()
1170 adev->vcn.inst[i].ring_enc[0].me = i; in vcn_v5_0_0_set_unified_ring_funcs()
1308 amdgpu_fence_process(&adev->vcn.inst[ip_instance].ring_enc[0]); in vcn_v5_0_0_process_interrupt()
H A Dvcn_v1_0.c182 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v1_0_sw_init()
256 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v1_0_hw_init()
985 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v1_0_start_spg_mode()
992 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v1_0_start_spg_mode()
1287 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v1_0_pause_dpg_mode()
1294 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v1_0_pause_dpg_mode()
1633 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v1_0_enc_ring_get_rptr()
1650 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v1_0_enc_ring_get_wptr()
1667 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v1_0_enc_ring_set_wptr()
1776 amdgpu_fence_process(&adev->vcn.inst->ring_enc[0]); in vcn_v1_0_process_interrupt()
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H A Dvcn_v4_0_5.c169 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_5_sw_init()
278 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_5_hw_init()
961 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v4_0_5_start_dpg_mode()
1145 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_5_start()
1350 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v4_0_5_unified_ring_get_rptr()
1367 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v4_0_5_unified_ring_get_wptr()
1387 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v4_0_5_unified_ring_set_wptr()
1442 adev->vcn.inst[i].ring_enc[0].funcs = &vcn_v4_0_5_unified_ring_vm_funcs; in vcn_v4_0_5_set_unified_ring_funcs()
1443 adev->vcn.inst[i].ring_enc[0].me = i; in vcn_v4_0_5_set_unified_ring_funcs()
1581 amdgpu_fence_process(&adev->vcn.inst[ip_instance].ring_enc[0]); in vcn_v4_0_5_process_interrupt()
H A Dvcn_v3_0.c248 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_sw_init()
374 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_hw_init()
402 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_hw_init()
1306 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v3_0_start()
1315 ring = &adev->vcn.inst[i].ring_enc[1]; in vcn_v3_0_start()
1438 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_start_sriov()
1682 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v3_0_pause_dpg_mode()
1692 ring = &adev->vcn.inst[inst_idx].ring_enc[1]; in vcn_v3_0_pause_dpg_mode()
1986 if (ring == &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v3_0_enc_ring_get_rptr()
2003 if (ring == &adev->vcn.inst[ring->me].ring_enc[0]) { in vcn_v3_0_enc_ring_get_wptr()
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H A Damdgpu_uvd.h46 struct amdgpu_ring ring_enc[AMDGPU_MAX_UVD_ENC_RINGS]; member
H A Damdgpu_vcn.c271 amdgpu_ring_fini(&adev->vcn.inst[j].ring_enc[i]); in amdgpu_vcn_sw_fini()
390 fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_enc[i]); in amdgpu_vcn_idle_work_handler()
453 fences += amdgpu_fence_count_emitted(&adev->vcn.inst[ring->me].ring_enc[i]); in amdgpu_vcn_ring_begin_use()
H A Damdgpu_vcn.h287 struct amdgpu_ring ring_enc[AMDGPU_VCN_MAX_ENC_RINGS]; member
H A Damdgpu_uvd.c389 amdgpu_ring_fini(&adev->uvd.inst[j].ring_enc[i]); in amdgpu_uvd_sw_fini()
1270 fences += amdgpu_fence_count_emitted(&adev->uvd.inst[i].ring_enc[j]); in amdgpu_uvd_idle_work_handler()
H A Djpeg_v1_0.c616 if (amdgpu_fence_wait_empty(&adev->vcn.inst->ring_enc[cnt])) in jpeg_v1_0_ring_begin_use()
H A Damdgpu_kms.c438 if (adev->uvd.inst[i].ring_enc[j].sched.ready) in amdgpu_hw_ip_info()
463 if (adev->vcn.inst[i].ring_enc[j].sched.ready) in amdgpu_hw_ip_info()