| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_ring.c | 86 int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned int ndw) in amdgpu_ring_alloc() argument
90 ndw = (ndw + ring->funcs->align_mask) & ~ring->funcs->align_mask; in amdgpu_ring_alloc()
95 if (WARN_ON_ONCE(ndw > ring->max_dw)) in amdgpu_ring_alloc()
98 ring->count_dw = ndw; in amdgpu_ring_alloc()
99 ring->wptr_old = ring->wptr; in amdgpu_ring_alloc()
101 if (ring->funcs->begin_use) in amdgpu_ring_alloc()
102 ring->funcs->begin_use(ring); in amdgpu_ring_alloc()
117 static void amdgpu_ring_alloc_reemit(struct amdgpu_ring *ring, unsigned int ndw) in amdgpu_ring_alloc_reemit() argument
121 ndw = (ndw + ring->funcs->align_mask) & ~ring->funcs->align_mask; in amdgpu_ring_alloc_reemit()
123 ring->count_dw = ndw; in amdgpu_ring_alloc_reemit()
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| H A D | amdgpu_fence.c | 63 static void amdgpu_fence_write(struct amdgpu_ring *ring, u32 seq) in amdgpu_fence_write() argument
65 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_write()
79 static u32 amdgpu_fence_read(struct amdgpu_ring *ring) in amdgpu_fence_read() argument
81 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_read()
94 af->fence_wptr_start = af->ring->wptr; in amdgpu_fence_save_fence_wptr_start()
99 af->fence_wptr_end = af->ring->wptr; in amdgpu_fence_save_fence_wptr_end()
112 int amdgpu_fence_emit(struct amdgpu_ring *ring, struct amdgpu_fence *af, in amdgpu_fence_emit() argument
115 struct amdgpu_device *adev = ring->adev; in amdgpu_fence_emit()
122 af->ring = ring; in amdgpu_fence_emit()
124 seq = ++ring->fence_drv.sync_seq; in amdgpu_fence_emit()
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| H A D | amdgpu_ib.c | 124 int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned int num_ibs, in amdgpu_ib_schedule() argument
128 struct amdgpu_device *adev = ring->adev; in amdgpu_ib_schedule()
177 if (!ring->sched.ready) { in amdgpu_ib_schedule()
178 dev_err(adev->dev, "couldn't schedule ib on ring <%s>\n", ring->name); in amdgpu_ib_schedule()
190 (!ring->funcs->secure_submission_supported)) { in amdgpu_ib_schedule()
191 dev_err(adev->dev, "secure submissions not supported on ring <%s>\n", ring->name); in amdgpu_ib_schedule()
196 alloc_size = ring->funcs->emit_frame_size + num_ibs * in amdgpu_ib_schedule()
197 ring->funcs->emit_ib_size; in amdgpu_ib_schedule()
199 r = amdgpu_ring_alloc(ring, alloc_size); in amdgpu_ib_schedule()
205 need_ctx_switch = ring->current_ctx != fence_ctx; in amdgpu_ib_schedule()
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| H A D | amdgpu_ring_mux.c | 44 struct amdgpu_ring *ring) in amdgpu_ring_mux_sw_entry() argument
46 return ring->entry_index < mux->ring_entry_size ? in amdgpu_ring_mux_sw_entry()
47 &mux->ring_entry[ring->entry_index] : NULL; in amdgpu_ring_mux_sw_entry()
52 struct amdgpu_ring *ring, in amdgpu_ring_mux_copy_pkt_from_sw_ring() argument
58 start = s_start & ring->buf_mask; in amdgpu_ring_mux_copy_pkt_from_sw_ring()
59 end = s_end & ring->buf_mask; in amdgpu_ring_mux_copy_pkt_from_sw_ring()
66 amdgpu_ring_alloc(real_ring, (ring->ring_size >> 2) + end - start); in amdgpu_ring_mux_copy_pkt_from_sw_ring()
67 amdgpu_ring_write_multiple(real_ring, (void *)&ring->ring[start], in amdgpu_ring_mux_copy_pkt_from_sw_ring()
68 (ring->ring_size >> 2) - start); in amdgpu_ring_mux_copy_pkt_from_sw_ring()
69 amdgpu_ring_write_multiple(real_ring, (void *)&ring->ring[0], end); in amdgpu_ring_mux_copy_pkt_from_sw_ring()
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| H A D | amdgpu_ring.h | 146 struct amdgpu_ring *ring; member
162 void amdgpu_fence_driver_set_error(struct amdgpu_ring *ring, int error);
163 void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring);
167 int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring);
168 int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
175 int amdgpu_fence_emit(struct amdgpu_ring *ring, struct amdgpu_fence *af,
177 int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s,
179 bool amdgpu_fence_process(struct amdgpu_ring *ring);
180 int amdgpu_fence_wait_empty(struct amdgpu_ring *ring);
181 signed long amdgpu_fence_wait_polling(struct amdgpu_ring *ring,
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| /linux/drivers/gpu/drm/radeon/ |
| H A D | radeon_ring.c | 50 static void radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring);
63 struct radeon_ring *ring) in radeon_ring_supports_scratch_reg() argument
65 switch (ring->idx) { in radeon_ring_supports_scratch_reg()
83 void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *ring) in radeon_ring_free_size() argument
85 uint32_t rptr = radeon_ring_get_rptr(rdev, ring); in radeon_ring_free_size()
88 ring->ring_free_dw = rptr + (ring->ring_size / 4); in radeon_ring_free_size()
89 ring->ring_free_dw -= ring->wptr; in radeon_ring_free_size()
90 ring->ring_free_dw &= ring->ptr_mask; in radeon_ring_free_size()
91 if (!ring->ring_free_dw) { in radeon_ring_free_size()
93 ring->ring_free_dw = ring->ring_size / 4; in radeon_ring_free_size()
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| H A D | radeon_fence.c | 67 static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring) in radeon_fence_write() argument
69 struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; in radeon_fence_write()
88 static u32 radeon_fence_read(struct radeon_device *rdev, int ring) in radeon_fence_read() argument
90 struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; in radeon_fence_read()
112 static void radeon_fence_schedule_check(struct radeon_device *rdev, int ring) in radeon_fence_schedule_check() argument
119 &rdev->fence_drv[ring].lockup_work, in radeon_fence_schedule_check()
135 int ring) in radeon_fence_emit() argument
145 (*fence)->seq = seq = ++rdev->fence_drv[ring].sync_seq[ring]; in radeon_fence_emit()
146 (*fence)->ring = ring; in radeon_fence_emit()
150 rdev->fence_context + ring, in radeon_fence_emit()
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| H A D | cik_sdma.c | 63 struct radeon_ring *ring) in cik_sdma_get_rptr() argument
68 rptr = rdev->wb.wb[ring->rptr_offs/4]; in cik_sdma_get_rptr()
70 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cik_sdma_get_rptr()
90 struct radeon_ring *ring) in cik_sdma_get_wptr() argument
94 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cik_sdma_get_wptr()
111 struct radeon_ring *ring) in cik_sdma_set_wptr() argument
115 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cik_sdma_set_wptr()
120 WREG32(reg, (ring->wptr << 2) & 0x3fffc); in cik_sdma_set_wptr()
135 struct radeon_ring *ring = &rdev->ring[ib->ring]; in cik_sdma_ring_ib_execute() local
136 u32 extra_bits = (ib->vm ? ib->vm->ids[ib->ring].id : 0) & 0xf; in cik_sdma_ring_ib_execute()
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| H A D | r600_dma.c | 51 struct radeon_ring *ring) in r600_dma_get_rptr() argument
56 rptr = rdev->wb.wb[ring->rptr_offs/4]; in r600_dma_get_rptr()
72 struct radeon_ring *ring) in r600_dma_get_wptr() argument
86 struct radeon_ring *ring) in r600_dma_set_wptr() argument
88 WREG32(DMA_RB_WPTR, (ring->wptr << 2) & 0x3fffc); in r600_dma_set_wptr()
108 rdev->ring[R600_RING_TYPE_DMA_INDEX].ready = false; in r600_dma_stop()
121 struct radeon_ring *ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; in r600_dma_resume() local
130 rb_bufsz = order_base_2(ring->ring_size / 4); in r600_dma_resume()
150 WREG32(DMA_RB_BASE, ring->gpu_addr >> 8); in r600_dma_resume()
166 ring->wptr = 0; in r600_dma_resume()
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| H A D | evergreen_dma.c | 43 struct radeon_ring *ring = &rdev->ring[fence->ring]; in evergreen_dma_fence_ring_emit() local
44 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in evergreen_dma_fence_ring_emit()
46 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_FENCE, 0, 0)); in evergreen_dma_fence_ring_emit()
47 radeon_ring_write(ring, addr & 0xfffffffc); in evergreen_dma_fence_ring_emit()
48 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff)); in evergreen_dma_fence_ring_emit()
49 radeon_ring_write(ring, fence->seq); in evergreen_dma_fence_ring_emit()
51 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_TRAP, 0, 0)); in evergreen_dma_fence_ring_emit()
53 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SRBM_WRITE, 0, 0)); in evergreen_dma_fence_ring_emit()
54 radeon_ring_write(ring, (0xf << 16) | (HDP_MEM_COHERENCY_FLUSH_CNTL >> 2)); in evergreen_dma_fence_ring_emit()
55 radeon_ring_write(ring, 1); in evergreen_dma_fence_ring_emit()
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| /linux/drivers/net/wireless/broadcom/b43legacy/ |
| H A D | dma.c | 32 struct b43legacy_dmadesc32 *op32_idx2desc(struct b43legacy_dmaring *ring, in op32_idx2desc() argument
38 *meta = &(ring->meta[slot]); in op32_idx2desc()
39 desc = ring->descbase; in op32_idx2desc()
45 static void op32_fill_descriptor(struct b43legacy_dmaring *ring, in op32_fill_descriptor() argument
50 struct b43legacy_dmadesc32 *descbase = ring->descbase; in op32_fill_descriptor()
57 B43legacy_WARN_ON(!(slot >= 0 && slot < ring->nr_slots)); in op32_fill_descriptor()
62 addr |= ring->dev->dma.translation; in op32_fill_descriptor()
63 ctl = (bufsize - ring->frameoffset) in op32_fill_descriptor()
65 if (slot == ring->nr_slots - 1) in op32_fill_descriptor()
80 static void op32_poke_tx(struct b43legacy_dmaring *ring, int slot) in op32_poke_tx() argument
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| /linux/drivers/soc/ti/ |
| H A D | k3-ringacc.c | 114 int (*push_tail)(struct k3_ring *ring, void *elm);
115 int (*push_head)(struct k3_ring *ring, void *elm);
116 int (*pop_tail)(struct k3_ring *ring, void *elm);
117 int (*pop_head)(struct k3_ring *ring, void *elm);
240 static int k3_ringacc_ring_read_occ(struct k3_ring *ring) in k3_ringacc_ring_read_occ() argument
242 return readl(&ring->rt->occ) & K3_RINGACC_RT_OCC_MASK; in k3_ringacc_ring_read_occ()
245 static void k3_ringacc_ring_update_occ(struct k3_ring *ring) in k3_ringacc_ring_update_occ() argument
249 val = readl(&ring->rt->occ); in k3_ringacc_ring_update_occ()
251 ring->state.occ = val & K3_RINGACC_RT_OCC_MASK; in k3_ringacc_ring_update_occ()
252 ring->state.tdown_complete = !!(val & K3_DMARING_RT_OCC_TDOWN_COMPLETE); in k3_ringacc_ring_update_occ()
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| /linux/drivers/net/wireless/broadcom/b43/ |
| H A D | dma.c | 72 struct b43_dmadesc_generic *op32_idx2desc(struct b43_dmaring *ring, in op32_idx2desc() argument
78 *meta = &(ring->meta[slot]); in op32_idx2desc()
79 desc = ring->descbase; in op32_idx2desc()
85 static void op32_fill_descriptor(struct b43_dmaring *ring, in op32_fill_descriptor() argument
90 struct b43_dmadesc32 *descbase = ring->descbase; in op32_fill_descriptor()
97 B43_WARN_ON(!(slot >= 0 && slot < ring->nr_slots)); in op32_fill_descriptor()
99 addr = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_LOW); in op32_fill_descriptor()
100 addrext = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_EXT); in op32_fill_descriptor()
103 if (slot == ring->nr_slots - 1) in op32_fill_descriptor()
118 static void op32_poke_tx(struct b43_dmaring *ring, int slot) in op32_poke_tx() argument
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| /linux/drivers/bus/mhi/ep/ |
| H A D | ring.c | 10 size_t mhi_ep_ring_addr2offset(struct mhi_ep_ring *ring, u64 ptr) in mhi_ep_ring_addr2offset() argument
12 return (ptr - ring->rbase) / sizeof(struct mhi_ring_element); in mhi_ep_ring_addr2offset()
15 static u32 mhi_ep_ring_num_elems(struct mhi_ep_ring *ring) in mhi_ep_ring_num_elems() argument
19 memcpy_fromio(&rlen, (void __iomem *) &ring->ring_ctx->generic.rlen, sizeof(u64)); in mhi_ep_ring_num_elems()
24 void mhi_ep_ring_inc_index(struct mhi_ep_ring *ring) in mhi_ep_ring_inc_index() argument
26 ring->rd_offset = (ring->rd_offset + 1) % ring->ring_size; in mhi_ep_ring_inc_index()
29 static int __mhi_ep_cache_ring(struct mhi_ep_ring *ring, size_t end) in __mhi_ep_cache_ring() argument
31 struct mhi_ep_cntrl *mhi_cntrl = ring->mhi_cntrl; in __mhi_ep_cache_ring()
38 if (ring->type == RING_TYPE_ER) in __mhi_ep_cache_ring()
42 if (ring->wr_offset == end) in __mhi_ep_cache_ring()
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| /linux/drivers/thunderbolt/ |
| H A D | nhi.c | 29 #define RING_TYPE(ring) ((ring)->is_tx ? "TX ring" : "RX ring") argument
54 static int ring_interrupt_index(const struct tb_ring *ring) in ring_interrupt_index() argument
56 int bit = ring->hop; in ring_interrupt_index()
57 if (!ring->is_tx) in ring_interrupt_index()
58 bit += ring->nhi->hop_count; in ring_interrupt_index()
62 static void nhi_mask_interrupt(struct tb_nhi *nhi, int mask, int ring) in nhi_mask_interrupt() argument
67 val = ioread32(nhi->iobase + REG_RING_INTERRUPT_BASE + ring); in nhi_mask_interrupt()
68 iowrite32(val & ~mask, nhi->iobase + REG_RING_INTERRUPT_BASE + ring); in nhi_mask_interrupt()
70 iowrite32(mask, nhi->iobase + REG_RING_INTERRUPT_MASK_CLEAR_BASE + ring); in nhi_mask_interrupt()
74 static void nhi_clear_interrupt(struct tb_nhi *nhi, int ring) in nhi_clear_interrupt() argument
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| /linux/drivers/net/ethernet/apm/xgene/ |
| H A D | xgene_enet_ring2.c | 12 static void xgene_enet_ring_init(struct xgene_enet_desc_ring *ring) in xgene_enet_ring_init() argument
14 u32 *ring_cfg = ring->state; in xgene_enet_ring_init()
15 u64 addr = ring->dma; in xgene_enet_ring_init()
17 if (xgene_enet_ring_owner(ring->id) == RING_OWNER_CPU) { in xgene_enet_ring_init()
18 ring_cfg[0] |= SET_VAL(X2_INTLINE, ring->id & RING_BUFNUM_MASK); in xgene_enet_ring_init()
27 ring_cfg[3] |= SET_VAL(RINGSIZE, ring->cfgsize) in xgene_enet_ring_init()
34 static void xgene_enet_ring_set_type(struct xgene_enet_desc_ring *ring) in xgene_enet_ring_set_type() argument
36 u32 *ring_cfg = ring->state; in xgene_enet_ring_set_type()
40 is_bufpool = xgene_enet_is_bufpool(ring->id); in xgene_enet_ring_set_type()
47 static void xgene_enet_ring_set_recombbuf(struct xgene_enet_desc_ring *ring) in xgene_enet_ring_set_recombbuf() argument
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| /linux/net/rds/ |
| H A D | ib_ring.c | 66 void rds_ib_ring_init(struct rds_ib_work_ring *ring, u32 nr) in rds_ib_ring_init() argument
68 memset(ring, 0, sizeof(*ring)); in rds_ib_ring_init()
69 ring->w_nr = nr; in rds_ib_ring_init()
70 rdsdebug("ring %p nr %u\n", ring, ring->w_nr); in rds_ib_ring_init()
73 static inline u32 __rds_ib_ring_used(struct rds_ib_work_ring *ring) in __rds_ib_ring_used() argument
78 diff = ring->w_alloc_ctr - (u32) atomic_read(&ring->w_free_ctr); in __rds_ib_ring_used()
79 BUG_ON(diff > ring->w_nr); in __rds_ib_ring_used()
84 void rds_ib_ring_resize(struct rds_ib_work_ring *ring, u32 nr) in rds_ib_ring_resize() argument
88 BUG_ON(__rds_ib_ring_used(ring)); in rds_ib_ring_resize()
89 ring->w_nr = nr; in rds_ib_ring_resize()
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| /linux/drivers/net/ethernet/marvell/octeon_ep_vf/ |
| H A D | octep_vf_regs_cnxk.h | 34 #define CNXK_VF_SDP_R_ERR_TYPE(ring) \ argument
35 (CNXK_VF_SDP_R_ERR_TYPE_START + ((ring) * CNXK_VF_RING_OFFSET))
37 #define CNXK_VF_SDP_R_IN_CONTROL(ring) \ argument
38 (CNXK_VF_SDP_R_IN_CONTROL_START + ((ring) * CNXK_VF_RING_OFFSET))
40 #define CNXK_VF_SDP_R_IN_ENABLE(ring) \ argument
41 (CNXK_VF_SDP_R_IN_ENABLE_START + ((ring) * CNXK_VF_RING_OFFSET))
43 #define CNXK_VF_SDP_R_IN_INSTR_BADDR(ring) \ argument
44 (CNXK_VF_SDP_R_IN_INSTR_BADDR_START + ((ring) * CNXK_VF_RING_OFFSET))
46 #define CNXK_VF_SDP_R_IN_INSTR_RSIZE(ring) \ argument
47 (CNXK_VF_SDP_R_IN_INSTR_RSIZE_START + ((ring) * CNXK_VF_RING_OFFSET))
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| H A D | octep_vf_regs_cn9k.h | 33 #define CN93_VF_SDP_R_IN_CONTROL(ring) \ argument
34 (CN93_VF_SDP_R_IN_CONTROL_START + ((ring) * CN93_VF_RING_OFFSET))
36 #define CN93_VF_SDP_R_IN_ENABLE(ring) \ argument
37 (CN93_VF_SDP_R_IN_ENABLE_START + ((ring) * CN93_VF_RING_OFFSET))
39 #define CN93_VF_SDP_R_IN_INSTR_BADDR(ring) \ argument
40 (CN93_VF_SDP_R_IN_INSTR_BADDR_START + ((ring) * CN93_VF_RING_OFFSET))
42 #define CN93_VF_SDP_R_IN_INSTR_RSIZE(ring) \ argument
43 (CN93_VF_SDP_R_IN_INSTR_RSIZE_START + ((ring) * CN93_VF_RING_OFFSET))
45 #define CN93_VF_SDP_R_IN_INSTR_DBELL(ring) \ argument
46 (CN93_VF_SDP_R_IN_INSTR_DBELL_START + ((ring) * CN93_VF_RING_OFFSET))
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| /linux/drivers/gpu/drm/i915/gt/ |
| H A D | intel_ring.c | 19 unsigned int intel_ring_update_space(struct intel_ring *ring) in intel_ring_update_space() argument
23 space = __intel_ring_space(ring->head, ring->emit, ring->size); in intel_ring_update_space()
25 ring->space = space; in intel_ring_update_space()
29 void __intel_ring_pin(struct intel_ring *ring) in __intel_ring_pin() argument
31 GEM_BUG_ON(!atomic_read(&ring->pin_count)); in __intel_ring_pin()
32 atomic_inc(&ring->pin_count); in __intel_ring_pin()
35 int intel_ring_pin(struct intel_ring *ring, struct i915_gem_ww_ctx *ww) in intel_ring_pin() argument
37 struct i915_vma *vma = ring->vma; in intel_ring_pin()
42 if (atomic_fetch_inc(&ring->pin_count)) in intel_ring_pin()
73 intel_ring_reset(ring, ring->emit); in intel_ring_pin()
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| H A D | selftest_ring.c | 8 struct intel_ring *ring; in mock_ring() local
10 ring = kzalloc(sizeof(*ring) + sz, GFP_KERNEL); in mock_ring()
11 if (!ring) in mock_ring()
14 kref_init(&ring->ref); in mock_ring()
15 ring->size = sz; in mock_ring()
16 ring->wrap = BITS_PER_TYPE(ring->size) - ilog2(sz); in mock_ring()
17 ring->effective_size = sz; in mock_ring()
18 ring->vaddr = (void *)(ring + 1); in mock_ring()
19 atomic_set(&ring->pin_count, 1); in mock_ring()
21 intel_ring_update_space(ring); in mock_ring()
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| /linux/tools/testing/selftests/net/ |
| H A D | psock_tpacket.c | 66 struct ring { struct
71 void (*walk)(int sock, struct ring *ring); argument
220 static void walk_v1_v2_rx(int sock, struct ring *ring) in walk_v1_v2_rx() argument
227 bug_on(ring->type != PACKET_RX_RING); in walk_v1_v2_rx()
239 while (__v1_v2_rx_kernel_ready(ring->rd[frame_num].iov_base, in walk_v1_v2_rx()
240 ring->version)) { in walk_v1_v2_rx()
241 ppd.raw = ring->rd[frame_num].iov_base; in walk_v1_v2_rx()
243 switch (ring->version) { in walk_v1_v2_rx()
260 __v1_v2_rx_user_ready(ppd.raw, ring->version); in walk_v1_v2_rx()
262 frame_num = (frame_num + 1) % ring->rd_num; in walk_v1_v2_rx()
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| /linux/drivers/crypto/intel/qat/qat_common/ |
| H A D | adf_transport.c | 40 static int adf_reserve_ring(struct adf_etr_bank_data *bank, u32 ring) in adf_reserve_ring() argument
43 if (bank->ring_mask & (1 << ring)) { in adf_reserve_ring()
47 bank->ring_mask |= (1 << ring); in adf_reserve_ring()
52 static void adf_unreserve_ring(struct adf_etr_bank_data *bank, u32 ring) in adf_unreserve_ring() argument
55 bank->ring_mask &= ~(1 << ring); in adf_unreserve_ring()
59 static void adf_enable_ring_irq(struct adf_etr_bank_data *bank, u32 ring) in adf_enable_ring_irq() argument
64 bank->irq_mask |= (1 << ring); in adf_enable_ring_irq()
72 static void adf_disable_ring_irq(struct adf_etr_bank_data *bank, u32 ring) in adf_disable_ring_irq() argument
77 bank->irq_mask &= ~(1 << ring); in adf_disable_ring_irq()
83 bool adf_ring_nearly_full(struct adf_etr_ring_data *ring) in adf_ring_nearly_full() argument
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| /linux/drivers/crypto/inside-secure/ |
| H A D | safexcel_ring.c | 78 struct safexcel_desc_ring *ring, in safexcel_ring_next_cwptr() argument
82 void *ptr = ring->write; in safexcel_ring_next_cwptr()
85 *atoken = ring->shwrite; in safexcel_ring_next_cwptr()
87 if ((ring->write == ring->read - ring->offset) || in safexcel_ring_next_cwptr()
88 (ring->read == ring->base && ring->write == ring->base_end)) in safexcel_ring_next_cwptr()
91 if (ring->write == ring->base_end) { in safexcel_ring_next_cwptr()
92 ring->write = ring->base; in safexcel_ring_next_cwptr()
93 ring->shwrite = ring->shbase; in safexcel_ring_next_cwptr()
95 ring->write += ring->offset; in safexcel_ring_next_cwptr()
96 ring->shwrite += ring->shoffset; in safexcel_ring_next_cwptr()
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| /linux/drivers/gpu/drm/msm/ |
| H A D | msm_ringbuffer.c | 17 struct msm_fence_context *fctx = submit->ring->fctx; in msm_job_run()
75 struct msm_ringbuffer *ring; in msm_ringbuffer_new() local
82 ring = kzalloc_obj(*ring); in msm_ringbuffer_new()
83 if (!ring) { in msm_ringbuffer_new()
88 ring->gpu = gpu; in msm_ringbuffer_new()
89 ring->id = id; in msm_ringbuffer_new()
91 ring->start = msm_gem_kernel_new(gpu->dev, MSM_GPU_RINGBUFFER_SZ, in msm_ringbuffer_new()
93 gpu->vm, &ring->bo, &ring->iova); in msm_ringbuffer_new()
95 if (IS_ERR(ring->start)) { in msm_ringbuffer_new()
96 ret = PTR_ERR(ring->start); in msm_ringbuffer_new()
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