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Searched refs:reset_level (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_err.c12 .reset_level = HNAE3_NONE_RESET
16 .reset_level = HNAE3_NONE_RESET
20 .reset_level = HNAE3_NONE_RESET
24 .reset_level = HNAE3_NONE_RESET
28 .reset_level = HNAE3_NONE_RESET
32 .reset_level = HNAE3_NONE_RESET
36 .reset_level = HNAE3_NONE_RESET
40 .reset_level = HNAE3_NONE_RESET
44 .reset_level = HNAE3_NONE_RESET
54 .reset_level = HNAE3_NONE_RESET
[all …]
H A Dhclge_err.h201 enum hnae3_reset_type reset_level; member
H A Dhclge_main.c4333 enum hnae3_reset_type reset_level; in hclge_update_reset_level() local
4345 reset_level = hclge_get_reset_level(ae_dev, in hclge_update_reset_level()
4347 if (reset_level != HNAE3_NONE_RESET) in hclge_update_reset_level()
4348 set_bit(reset_level, &hdev->reset_request); in hclge_update_reset_level()
4551 hdev->reset_level = in hclge_reset_event()
4555 hdev->reset_level = HNAE3_FUNC_RESET; in hclge_reset_event()
4559 hdev->reset_level); in hclge_reset_event()
4562 set_bit(hdev->reset_level, &hdev->reset_request); in hclge_reset_event()
4565 if (hdev->reset_level < HNAE3_GLOBAL_RESET) in hclge_reset_event()
4566 hdev->reset_level++; in hclge_reset_event()
[all …]
H A Dhclge_main.h891 enum hnae3_reset_type reset_level; member
/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Dfw_reset.c90 static int mlx5_reg_mfrl_set(struct mlx5_core_dev *dev, u8 reset_level, in mlx5_reg_mfrl_set() argument
96 MLX5_SET(mfrl_reg, in, reset_level, reset_level); in mlx5_reg_mfrl_set()
104 static int mlx5_reg_mfrl_query(struct mlx5_core_dev *dev, u8 *reset_level, in mlx5_reg_mfrl_query() argument
115 if (reset_level) in mlx5_reg_mfrl_query()
116 *reset_level = MLX5_GET(mfrl_reg, out, reset_level); in mlx5_reg_mfrl_query()
127 int mlx5_fw_reset_query(struct mlx5_core_dev *dev, u8 *reset_level, u8 *reset_type) in mlx5_fw_reset_query() argument
129 return mlx5_reg_mfrl_query(dev, reset_level, reset_type, NULL, NULL); in mlx5_fw_reset_query()
195 MLX5_SET(mfrl_reg, in, reset_level, MLX5_MFRL_REG_RESET_LEVEL3); in mlx5_fw_reset_set_reset_sync()
H A Dfw_reset.h9 int mlx5_fw_reset_query(struct mlx5_core_dev *dev, u8 *reset_level, u8 *reset_type);
H A Ddevlink.c142 u8 reset_level, reset_type, net_port_alive; in mlx5_devlink_reload_fw_activate() local
145 err = mlx5_fw_reset_query(dev, &reset_level, &reset_type); in mlx5_devlink_reload_fw_activate()
148 if (!(reset_level & MLX5_MFRL_REG_RESET_LEVEL3)) { in mlx5_devlink_reload_fw_activate()
174 u8 reset_level; in mlx5_devlink_trigger_fw_live_patch() local
177 err = mlx5_fw_reset_query(dev, &reset_level, NULL); in mlx5_devlink_trigger_fw_live_patch()
180 if (!(reset_level & MLX5_MFRL_REG_RESET_LEVEL0)) { in mlx5_devlink_trigger_fw_live_patch()
/linux/drivers/net/ethernet/intel/ice/
H A Dice_fw_update.h14 u8 *reset_level, struct netlink_ext_ack *extack);
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_client.c24 u32 reset_level);
631 u32 reset_level) in i40e_client_request_reset() argument
635 switch (reset_level) { in i40e_client_request_reset()
645 pf->hw.pf_id, reset_level); in i40e_client_request_reset()
/linux/drivers/net/ethernet/hisilicon/hns3/hns3vf/
H A Dhclgevf_main.h219 enum hnae3_reset_type reset_level; member