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Searched refs:reorder (Results 1 – 25 of 39) sorted by relevance

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/linux/arch/mips/kernel/
H A Dbmips_5xxx_init.S39 .set reorder ;
199 .set reorder define
291 .set reorder define
316 .set reorder define
403 .set reorder define
439 .set reorder define
472 .set reorder define
496 .set reorder define
516 .set reorder define
541 .set reorder define
[all …]
H A Dr2300_fpu.S124 .set reorder define
H A Dmcount.S220 .set reorder define
H A Dgenex.S153 .set reorder define
649 .set reorder define
H A Dr4k_fpu.S411 .set reorder define
H A Docteon_switch.S54 .set reorder define
/linux/arch/mips/lib/
H A Dmemset.S99 .set reorder define
116 .set reorder define
134 .set reorder;
190 .set reorder define
199 .set reorder define
227 .set reorder define
H A Dmemcpy.S371 .set reorder /* DADDI_WAR */ define
387 .set reorder /* DADDI_WAR */ define
472 .set reorder /* DADDI_WAR */ define
489 .set reorder /* DADDI_WAR */ define
562 .set reorder /* DADDI_WAR */ define
576 .set reorder; /* DADDI_WAR */ \
592 .set reorder /* DADDI_WAR */ define
629 .set reorder /* DADDI_WAR */ define
644 .set reorder /* DADDI_WAR */ define
H A Dcsum_partial.S198 .set reorder /* DADDI_WAR */ define
230 .set reorder /* DADDI_WAR */ define
300 .set reorder define
498 .set reorder /* DADDI_WAR */ define
530 .set reorder /* DADDI_WAR */ define
546 .set reorder /* DADDI_WAR */ define
572 .set reorder define
635 .set reorder /* DADDI_WAR */ define
652 .set reorder /* DADDI_WAR */ define
726 .set reorder define
H A Dstrnlen_user.S55 .set reorder define
/linux/kernel/
H A Dpadata.c252 struct padata_list *reorder; in padata_find_next() local
254 reorder = per_cpu_ptr(pd->reorder_list, cpu); in padata_find_next()
256 spin_lock(&reorder->lock); in padata_find_next()
257 if (list_empty(&reorder->list)) in padata_find_next()
260 padata = list_entry(reorder->list.next, struct padata_priv, list); in padata_find_next()
270 spin_unlock(&reorder->lock); in padata_find_next()
276 spin_unlock(&reorder->lock); in padata_find_next()
363 struct padata_list *reorder = per_cpu_ptr(pd->reorder_list, hashed_cpu); in padata_do_serial() local
368 spin_lock(&reorder->lock); in padata_do_serial()
370 list_for_each_prev(pos, &reorder->list) { in padata_do_serial()
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/linux/drivers/net/wireless/intel/iwlwifi/mld/
H A Dagg.c199 u32 reorder = le32_to_cpu(desc->reorder_data); in iwl_mld_reorder() local
208 baid = u32_get_bits(reorder, IWL_RX_MPDU_REORDER_BAID_MASK); in iwl_mld_reorder()
236 baid, reorder); in iwl_mld_reorder()
255 is_old_sn = !!(reorder & IWL_RX_MPDU_REORDER_BA_OLD_SN); in iwl_mld_reorder()
268 sn = u32_get_bits(reorder, IWL_RX_MPDU_REORDER_SN_MASK); in iwl_mld_reorder()
269 nssn = u32_get_bits(reorder, IWL_RX_MPDU_REORDER_NSSN_MASK); in iwl_mld_reorder()
/linux/net/sched/
H A Dsch_netem.c98 u32 reorder; member
555 q->reorder < get_crandom(&q->reorder_cor, &q->prng)) { in netem_enqueue()
864 q->reorder = r->probability; in get_reorder()
1081 q->reorder = ~0; in netem_change()
1214 struct tc_netem_reorder reorder; in netem_dump() local
1242 reorder.probability = q->reorder; in netem_dump()
1243 reorder.correlation = q->reorder_cor.rho; in netem_dump()
1244 if (nla_put(skb, TCA_NETEM_REORDER, sizeof(reorder), &reorder)) in netem_dump()
/linux/lib/crypto/mips/
H A Dchacha-core.S169 .set reorder
180 .set reorder
197 .set reorder define
363 .set reorder define
/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/
H A Dproto.h15 u8 *reorder; member
108 return !!rd->reorder; in brcmf_proto_is_reorder_skb()
/linux/arch/mips/include/asm/
H A Dasm.h104 .set reorder; \
117 .set reorder; \
/linux/tools/memory-model/Documentation/
H A Dcontrol-dependencies.txt53 b = 1; /* BUG: Compiler and CPU can both reorder!!! */
88 "b", which means that the CPU is within its rights to reorder them: The
195 compiler cannot reorder volatile accesses and also cannot reorder
H A Dordering.txt464 reorder marked writes with each other or with other unordered
472 reorder marked reads with each other or with other unordered
483 However, many CPUs will happily reorder these operations with
/linux/arch/mips/include/asm/mach-malta/
H A Dkernel-entry-init.h42 .set reorder
/linux/fs/xfs/libxfs/
H A Dxfs_log_recover.h34 enum xlog_recover_reorder (*reorder)(struct xlog_recover_item *item); member
/linux/arch/arm/mach-pxa/
H A Dsleep.S158 @ Do not reorder...
/linux/net/dccp/
H A Dfeat.c
/linux/Documentation/
H A Dmemory-barriers.txt550 hardware[*] will not reorder the memory accesses. CPU cache coherency
731 b = 1; /* BUG: Compiler and CPU can both reorder!!! */
764 'b', which means that the CPU is within its rights to reorder them:
868 compiler cannot reorder volatile accesses and also cannot reorder
1560 (*) The compiler is within its rights to reorder loads and stores
1562 rights to reorder loads to the same variable. This means that
1683 (*) The compiler is within its rights to reorder memory accesses unless
1832 which may then reorder things however it wishes.
2488 efficient to reorder, combine or merge accesses - something that would cause
2689 Similarly, it has to be assumed that compiler might reorder the instruction
[all …]
/linux/arch/mips/include/asm/sibyte/
H A Dsb1250_scd.h143 .set reorder ; \
/linux/Documentation/RCU/
H A Dchecklist.rst128 CPUs' tendency to reorder memory references. One must
154 Please note that compilers can also reorder code, and
482 and the compiler to freely reorder code into and out of RCU

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