Searched refs:remap_array (Results 1 – 2 of 2) sorted by relevance
199 ctx->map.remap_array[i] = (reg >> (j * shift)) & mask; in df3_6ch_get_dram_addr_map()270 memset(&ctx->map.remap_array, 0xFF, sizeof(ctx->map.remap_array)); in df4_get_dram_addr_map()282 ctx->map.remap_array[i] = (remap_reg >> (j * shift)) & mask; in df4_get_dram_addr_map()291 ctx->map.remap_array[i] = (remap_reg >> (j * shift)) & mask; in df4_get_dram_addr_map()326 memset(&ctx->map.remap_array, 0xFF, sizeof(ctx->map.remap_array)); in df4p5_get_dram_addr_map()338 ctx->map.remap_array[i] = (remap_reg >> (j * shift)) & mask; in df4p5_get_dram_addr_map()347 ctx->map.remap_array[i] = (remap_reg >> (j * shift)) & mask; in df4p5_get_dram_addr_map()356 ctx->map.remap_array[i] = (remap_reg >> (j * shift)) & mask; in df4p5_get_dram_addr_map()750 pr_debug("remap_array[%u]=0x%x", i, map->remap_array[i]); in dump_address_map()
439 unsigned int remap_array[DML2_MAX_PLANES]; in are_timings_trivially_synchronizable() local445 remap_array[remap_array_size++] = i; in are_timings_trivially_synchronizable()455 …mp(&display_config->stream_descriptors[remap_array[i - 1]].timing, &display_config->stream_descrip… in are_timings_trivially_synchronizable()463 if (display_config->stream_descriptors[remap_array[i]].timing.drr_config.enabled) { in are_timings_trivially_synchronizable()477 unsigned int remap_array[DML2_MAX_PLANES]; in find_smallest_idle_time_in_vblank_us() local484 remap_array[remap_array_size++] = i; in find_smallest_idle_time_in_vblank_us()491 …min_idle_us = mode_support_result->cfg_support_info.stream_support_info[remap_array[0]].vblank_res… in find_smallest_idle_time_in_vblank_us()494 …if (min_idle_us > mode_support_result->cfg_support_info.stream_support_info[remap_array[i]].vblank… in find_smallest_idle_time_in_vblank_us()495 …min_idle_us = mode_support_result->cfg_support_info.stream_support_info[remap_array[i]].vblank_res… in find_smallest_idle_time_in_vblank_us()