Home
last modified time | relevance | path

Searched refs:regvalue (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/scsi/aic7xxx/
H A Daic79xx_reg_print.c_shipped24 ahd_intstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
27 0x01, regvalue, cur_col, wrap));
36 ahd_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap)
39 0x0b, regvalue, cur_col, wrap));
51 ahd_seqintstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
54 0x0c, regvalue, cur_col, wrap));
69 ahd_intctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
72 0x18, regvalue, cur_col, wrap));
90 ahd_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
93 0x19, regvalue, cur_col, wrap));
[all …]
H A Daic7xxx_reg_print.c_shipped23 ahc_scsiseq_print(u_int regvalue, u_int *cur_col, u_int wrap)
26 0x00, regvalue, cur_col, wrap));
40 ahc_sxfrctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
43 0x01, regvalue, cur_col, wrap));
67 ahc_scsisigi_print(u_int regvalue, u_int *cur_col, u_int wrap)
70 0x03, regvalue, cur_col, wrap));
83 ahc_scsirate_print(u_int regvalue, u_int *cur_col, u_int wrap)
86 0x04, regvalue, cur_col, wrap));
102 ahc_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
105 0x0b, regvalue, cur_col, wrap));
[all …]
H A Daic79xx_reg.h_shipped18 #define ahd_intstat_print(regvalue, cur_col, wrap) \
19 ahd_print_register(NULL, 0, "INTSTAT", 0x01, regvalue, cur_col, wrap)
25 #define ahd_hs_mailbox_print(regvalue, cur_col, wrap) \
26 ahd_print_register(NULL, 0, "HS_MAILBOX", 0x0b, regvalue, cur_col, wrap)
32 #define ahd_seqintstat_print(regvalue, cur_col, wrap) \
33 ahd_print_register(NULL, 0, "SEQINTSTAT", 0x0c, regvalue, cur_col, wrap)
39 #define ahd_intctl_print(regvalue, cur_col, wrap) \
40 ahd_print_register(NULL, 0, "INTCTL", 0x18, regvalue, cur_col, wrap)
46 #define ahd_dfcntrl_print(regvalue, cur_col, wrap) \
47 ahd_print_register(NULL, 0, "DFCNTRL", 0x19, regvalue, cur_col, wrap)
[all …]
H A Daic7xxx_reg.h_shipped18 #define ahc_scsiseq_print(regvalue, cur_col, wrap) \
19 ahc_print_register(NULL, 0, "SCSISEQ", 0x00, regvalue, cur_col, wrap)
25 #define ahc_sxfrctl0_print(regvalue, cur_col, wrap) \
26 ahc_print_register(NULL, 0, "SXFRCTL0", 0x01, regvalue, cur_col, wrap)
32 #define ahc_scsisigi_print(regvalue, cur_col, wrap) \
33 ahc_print_register(NULL, 0, "SCSISIGI", 0x03, regvalue, cur_col, wrap)
39 #define ahc_scsirate_print(regvalue, cur_col, wrap) \
40 ahc_print_register(NULL, 0, "SCSIRATE", 0x04, regvalue, cur_col, wrap)
46 #define ahc_sstat0_print(regvalue, cur_col, wrap) \
47 ahc_print_register(NULL, 0, "SSTAT0", 0x0b, regvalue, cur_col, wrap)
[all …]
/linux/sound/soc/mediatek/mt8173/
H A Dmt8173-afe-pcm.c167 unsigned int regvalue; member
171 { .rate = 8000, .regvalue = 0 },
172 { .rate = 11025, .regvalue = 1 },
173 { .rate = 12000, .regvalue = 2 },
174 { .rate = 16000, .regvalue = 4 },
175 { .rate = 22050, .regvalue = 5 },
176 { .rate = 24000, .regvalue = 6 },
177 { .rate = 32000, .regvalue = 8 },
178 { .rate = 44100, .regvalue = 9 },
179 { .rate = 48000, .regvalue
[all...]
/linux/drivers/clk/mstar/
H A Dclk-msc313-cpupll.c89 static void msc313_cpupll_setfreq(struct msc313_cpupll *cpupll, u32 regvalue) in msc313_cpupll_setfreq() argument
93 msc313_cpupll_reg_write32(cpupll, REG_LPF_HIGH_BOTTOM, regvalue); in msc313_cpupll_setfreq()
114 msc313_cpupll_reg_write32(cpupll, REG_LPF_LOW_L, regvalue); in msc313_cpupll_setfreq()
/linux/sound/soc/codecs/
H A Drt712-sdca-dmic.c252 unsigned int regvalue, ctl, i; in rt712_sdca_dmic_set_gain_get() local
261 regmap_read(rt712->mbq_regmap, p->reg_base + i, &regvalue); in rt712_sdca_dmic_set_gain_get()
264 ctl = regvalue / 0x0a00; in rt712_sdca_dmic_set_gain_get()
266 ctl = p->max - (((0x1e00 - regvalue) & 0xffff) / interval_offset); in rt712_sdca_dmic_set_gain_get()
283 unsigned int regvalue[4]; in rt712_sdca_dmic_set_gain_put() local
292 regmap_read(rt712->mbq_regmap, p->reg_base + i, &regvalue[i]); in rt712_sdca_dmic_set_gain_put()
305 if (regvalue[i] != gain_val[i]) in rt712_sdca_dmic_set_gain_put()
H A Drt766-sdca.c481 unsigned int regvalue, ctl, i; in rt766_sdca_dmic_set_gain_get() local
485 regmap_read(rt766->regmap, p->reg_base + i, &regvalue); in rt766_sdca_dmic_set_gain_get()
486 ctl = p->max - (((0x1e00 - regvalue) & 0xffff) / interval_offset); in rt766_sdca_dmic_set_gain_get()
504 unsigned int regvalue[4]; in rt766_sdca_dmic_set_gain_put() local
509 regmap_read(rt766->regmap, p->reg_base + i, &regvalue[i]); in rt766_sdca_dmic_set_gain_put()
518 if (regvalue[i] != gain_val[i]) in rt766_sdca_dmic_set_gain_put()
H A Drt721-sdca.c624 unsigned int regvalue, ctl, i; in rt721_sdca_dmic_set_gain_get() local
633 regmap_read(rt721->mbq_regmap, p->reg_base + i, &regvalue); in rt721_sdca_dmic_set_gain_get()
636 ctl = regvalue / boost_step; in rt721_sdca_dmic_set_gain_get()
638 ctl = p->max - (((vol_max - regvalue) & 0xffff) / interval_offset); in rt721_sdca_dmic_set_gain_get()
657 unsigned int regvalue[4]; in rt721_sdca_dmic_set_gain_put() local
666 regmap_read(rt721->mbq_regmap, p->reg_base + i, &regvalue[i]); in rt721_sdca_dmic_set_gain_put()
679 if (regvalue[i] != gain_val[i]) in rt721_sdca_dmic_set_gain_put()
H A Drt722-sdca.c928 unsigned int regvalue, ctl, i; in rt722_sdca_dmic_set_gain_get() local
937 regmap_read(rt722->regmap, p->reg_base + i, &regvalue); in rt722_sdca_dmic_set_gain_get()
940 ctl = regvalue / boost_step; in rt722_sdca_dmic_set_gain_get()
942 ctl = p->max - (((vol_max - regvalue) & 0xffff) / interval_offset); in rt722_sdca_dmic_set_gain_get()
961 unsigned int regvalue[4]; in rt722_sdca_dmic_set_gain_put() local
970 regmap_read(rt722->regmap, p->reg_base + i, &regvalue[i]); in rt722_sdca_dmic_set_gain_put()
983 if (regvalue[i] != gain_val[i]) in rt722_sdca_dmic_set_gain_put()
H A Drt712-sdca.c1121 unsigned int regvalue, ctl, i; in rt712_sdca_dmic_set_gain_get() local
1130 regmap_read(rt712->mbq_regmap, p->reg_base + i, &regvalue); in rt712_sdca_dmic_set_gain_get()
1133 ctl = regvalue / 0x0a00; in rt712_sdca_dmic_set_gain_get()
1135 ctl = p->max - (((0x1e00 - regvalue) & 0xffff) / interval_offset); in rt712_sdca_dmic_set_gain_get()
1152 unsigned int regvalue[4]; in rt712_sdca_dmic_set_gain_put() local
1161 regmap_read(rt712->mbq_regmap, p->reg_base + i, &regvalue[i]); in rt712_sdca_dmic_set_gain_put()
1174 if (regvalue[i] != gain_val[i]) in rt712_sdca_dmic_set_gain_put()
H A Drt1320-sdw.c2622 unsigned int regvalue[4], gain_val[4], i; in rt1320_set_gain_put() local
2663 regmap_read(rt1320->mbq_regmap, reg_base + i, &regvalue[i]); in rt1320_set_gain_put()
2666 regmap_read(rt1320->mbq_regmap, reg_base + i - 2, &regvalue[i]); in rt1320_set_gain_put()
2671 regmap_read(rt1320->mbq_regmap, reg_base + i, &regvalue[i]); in rt1320_set_gain_put()
2681 if (regvalue[i] != gain_val[i]) in rt1320_set_gain_put()
2722 unsigned int reg_base, regvalue, ctl, i; in rt1320_set_gain_get() local
2751 regmap_read(rt1320->mbq_regmap, reg_base + i, &regvalue); in rt1320_set_gain_get()
2754 regmap_read(rt1320->mbq_regmap, reg_base + i - 2, &regvalue); in rt1320_set_gain_get()
2759 regmap_read(rt1320->mbq_regmap, reg_base + i, &regvalue); in rt1320_set_gain_get()
2763 ctl = p->max - (((0x1e00 - regvalue) & 0xffff) / interval_offset); in rt1320_set_gain_get()
/linux/drivers/mmc/host/
H A Dvub300.c291 unsigned regvalue:8; member
557 vub300->sdio_register[i].regvalue = in add_offloaded_reg()
1886 u8 rsp3 = vub300->sdio_register[i].regvalue; in satisfy_request_from_offloaded_data()