Searched refs:region6 (Results 1 – 14 of 14) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dmub/src/ |
| H A D | dmub_dcn30.h | 47 const struct dmub_window *region6);
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| H A D | dmub_dcn401.c | 194 const struct dmub_window *region6) in dmub_dcn401_setup_windows() argument
241 offset = region6->offset; in dmub_dcn401_setup_windows()
247 region6->region.top - region6->region.base - 1, in dmub_dcn401_setup_windows()
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| H A D | dmub_dcn35.c | 233 const struct dmub_window *region6) in dmub_dcn35_setup_windows() argument
280 offset = region6->offset; in dmub_dcn35_setup_windows()
286 region6->region.top - region6->region.base - 1, in dmub_dcn35_setup_windows()
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| H A D | dmub_srv.c | 624 struct dmub_window cw0, cw1, cw2, cw3, cw4, cw5, cw6, region6; in dmub_srv_hw_init() local
709 region6.offset.quad_part = shared_state_fb->gpu_addr; in dmub_srv_hw_init()
710 region6.region.base = DMUB_CW6_BASE; in dmub_srv_hw_init()
711 region6.region.top = region6.region.base + shared_state_fb->size; in dmub_srv_hw_init()
718 dmub->hw_funcs.setup_windows(dmub, &cw2, &cw3, &cw4, &cw5, &cw6, ®ion6); in dmub_srv_hw_init()
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| H A D | dmub_dcn30.c | 128 const struct dmub_window *region6) in dmub_dcn30_setup_windows() argument
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| H A D | dmub_dcn20.h | 201 const struct dmub_window *region6);
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| H A D | dmub_dcn31.h | 203 const struct dmub_window *region6);
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| H A D | dmub_dcn32.h | 210 const struct dmub_window *region6);
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| H A D | dmub_dcn35.h | 223 const struct dmub_window *region6);
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| H A D | dmub_dcn401.h | 219 const struct dmub_window *region6);
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| H A D | dmub_dcn20.c | 195 const struct dmub_window *region6) in dmub_dcn20_setup_windows() argument
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| H A D | dmub_dcn31.c | 191 const struct dmub_window *region6) in dmub_dcn31_setup_windows() argument
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| H A D | dmub_dcn32.c | 220 const struct dmub_window *region6) in dmub_dcn32_setup_windows() argument
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| /linux/drivers/gpu/drm/amd/display/dmub/ |
| H A D | dmub_srv.h | 397 const struct dmub_window *region6);
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