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Searched refs:regbase (Results 1 – 25 of 44) sorted by relevance

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/linux/drivers/video/fbdev/core/
H A Dsvgalib.c24 void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value) in svga_wcrt_multi() argument
29 regval = vga_rcrt(regbase, regset->regnum); in svga_wcrt_multi()
39 vga_wcrt(regbase, regset->regnum, regval); in svga_wcrt_multi()
45 void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value) in svga_wseq_multi() argument
50 regval = vga_rseq(regbase, regset->regnum); in svga_wseq_multi()
60 vga_wseq(regbase, regset->regnum, regval); in svga_wseq_multi()
79 void svga_set_default_gfx_regs(void __iomem *regbase) in svga_set_default_gfx_regs() argument
82 vga_wgfx(regbase, VGA_GFX_SR_VALUE, 0x00); in svga_set_default_gfx_regs()
83 vga_wgfx(regbase, VGA_GFX_SR_ENABLE, 0x00); in svga_set_default_gfx_regs()
84 vga_wgfx(regbase, VGA_GFX_COMPARE_VALUE, 0x00); in svga_set_default_gfx_regs()
[all …]
/linux/drivers/clocksource/
H A Dtimer-vt8500.c41 static void __iomem *regbase; variable
46 writel(3, regbase + TIMER_CTRL_VAL); in vt8500_timer_read()
47 while ((readl((regbase + TIMER_AS_VAL)) & TIMER_COUNT_R_ACTIVE) in vt8500_timer_read()
50 return readl(regbase + TIMER_COUNT_VAL); in vt8500_timer_read()
66 while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE) in vt8500_timer_set_next_event()
69 writel((unsigned long)alarm, regbase + TIMER_MATCH_VAL); in vt8500_timer_set_next_event()
74 writel(1, regbase + TIMER_IER_VAL); in vt8500_timer_set_next_event()
81 writel(readl(regbase + TIMER_CTRL_VAL) | 1, regbase + TIMER_CTRL_VAL); in vt8500_shutdown()
82 writel(0, regbase + TIMER_IER_VAL); in vt8500_shutdown()
98 writel(0xf, regbase + TIMER_STATUS_VAL); in vt8500_timer_interrupt()
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/linux/include/linux/
H A Dsvga.h71 static inline void svga_wattr(void __iomem *regbase, u8 index, u8 data) in svga_wattr() argument
73 vga_r(regbase, VGA_IS1_RC); in svga_wattr()
74 vga_w(regbase, VGA_ATT_IW, index); in svga_wattr()
75 vga_w(regbase, VGA_ATT_W, data); in svga_wattr()
80 static inline void svga_wseq_mask(void __iomem *regbase, u8 index, u8 data, u8 mask) in svga_wseq_mask() argument
82 vga_wseq(regbase, index, (data & mask) | (vga_rseq(regbase, index) & ~mask)); in svga_wseq_mask()
87 static inline void svga_wcrt_mask(void __iomem *regbase, u8 index, u8 data, u8 mask) in svga_wcrt_mask() argument
89 vga_wcrt(regbase, index, (data & mask) | (vga_rcrt(regbase, index) & ~mask)); in svga_wcrt_mask()
100 void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value);
101 void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value);
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/linux/drivers/rtc/
H A Drtc-sh.c88 void __iomem *regbase; member
103 tmp = readb(rtc->regbase + RCR1); in sh_rtc_alarm()
106 writeb(tmp, rtc->regbase + RCR1); in sh_rtc_alarm()
123 tmp = readb(rtc->regbase + RCR1); in sh_rtc_alarm_irq_enable()
130 writeb(tmp, rtc->regbase + RCR1); in sh_rtc_alarm_irq_enable()
142 if (!(readb(rtc->regbase + RCR2) & RCR2_RTCEN)) in sh_rtc_read_time()
150 tmp = readb(rtc->regbase + RCR1); in sh_rtc_read_time()
153 writeb(tmp, rtc->regbase + RCR1); in sh_rtc_read_time()
155 sec128 = readb(rtc->regbase + R64CNT); in sh_rtc_read_time()
157 tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT)); in sh_rtc_read_time()
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H A Drtc-vt8500.c73 void __iomem *regbase; member
88 isr = readl(vt8500_rtc->regbase + VT8500_RTC_IS); in vt8500_rtc_irq()
89 writel(isr, vt8500_rtc->regbase + VT8500_RTC_IS); in vt8500_rtc_irq()
106 date = readl(vt8500_rtc->regbase + VT8500_RTC_DR); in vt8500_rtc_read_time()
107 time = readl(vt8500_rtc->regbase + VT8500_RTC_TR); in vt8500_rtc_read_time()
129 vt8500_rtc->regbase + VT8500_RTC_DS); in vt8500_rtc_set_time()
134 vt8500_rtc->regbase + VT8500_RTC_TS); in vt8500_rtc_set_time()
144 alarm = readl(vt8500_rtc->regbase + VT8500_RTC_AS); in vt8500_rtc_read_alarm()
145 isr = readl(vt8500_rtc->regbase + VT8500_RTC_IS); in vt8500_rtc_read_alarm()
167 vt8500_rtc->regbase + VT8500_RTC_AS); in vt8500_rtc_set_alarm()
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/linux/drivers/video/fbdev/
H A Dwm8505fb.c38 void __iomem *regbase; member
51 writel(0, fbi->regbase + i); in wm8505fb_init_hw()
54 writel(fbi->fb.fix.smem_start, fbi->regbase + WMT_GOVR_FBADDR); in wm8505fb_init_hw()
55 writel(fbi->fb.fix.smem_start, fbi->regbase + WMT_GOVR_FBADDR1); in wm8505fb_init_hw()
62 writel(0x31c, fbi->regbase + WMT_GOVR_COLORSPACE); in wm8505fb_init_hw()
63 writel(1, fbi->regbase + WMT_GOVR_COLORSPACE1); in wm8505fb_init_hw()
66 writel(info->var.xres, fbi->regbase + WMT_GOVR_XRES); in wm8505fb_init_hw()
67 writel(info->var.xres_virtual, fbi->regbase + WMT_GOVR_XRES_VIRTUAL); in wm8505fb_init_hw()
70 writel(0xf, fbi->regbase + WMT_GOVR_FHI); in wm8505fb_init_hw()
71 writel(4, fbi->regbase + WMT_GOVR_DVO_SET); in wm8505fb_init_hw()
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/linux/drivers/comedi/drivers/
H A Dcomedi_8255.c44 int dir, int port, int data, unsigned long regbase) in subdev_8255_io() argument
47 outb(data, dev->iobase + regbase + port); in subdev_8255_io()
50 return inb(dev->iobase + regbase + port); in subdev_8255_io()
56 int dir, int port, int data, unsigned long regbase) in subdev_8255_mmio() argument
59 writeb(data, dev->mmio + regbase + port); in subdev_8255_mmio()
62 return readb(dev->mmio + regbase + port); in subdev_8255_mmio()
190 unsigned long regbase) in subdev_8255_io_init() argument
192 return __subdev_8255_init(dev, s, subdev_8255_io, regbase); in subdev_8255_io_init()
209 unsigned long regbase) in subdev_8255_mm_init() argument
211 return __subdev_8255_init(dev, s, subdev_8255_mmio, regbase); in subdev_8255_mm_init()
H A D8255.c107 unsigned long regbase = subdev_8255_regbase(s); in dev_8255_detach() local
109 release_region(regbase, I8255_SIZE); in dev_8255_detach()
/linux/drivers/clk/uniphier/
H A Dclk-uniphier-cpugear.c21 unsigned int regbase; member
35 gear->regbase + UNIPHIER_CLK_CPUGEAR_SET, in uniphier_clk_cpugear_set_parent()
41 gear->regbase + UNIPHIER_CLK_CPUGEAR_UPD, in uniphier_clk_cpugear_set_parent()
48 gear->regbase + UNIPHIER_CLK_CPUGEAR_UPD, in uniphier_clk_cpugear_set_parent()
61 gear->regbase + UNIPHIER_CLK_CPUGEAR_STAT, &val); in uniphier_clk_cpugear_get_parent()
96 gear->regbase = data->regbase; in uniphier_clk_register_cpugear()
H A Dclk-uniphier.h28 unsigned int regbase; member
78 .regbase = (_regbase), \
/linux/drivers/spi/
H A Dspi-hisi-sfc-v3xx.c76 void __iomem *regbase; member
85 writel(0, host->regbase + HISI_SFC_V3XX_INT_MASK); in hisi_sfc_v3xx_disable_int()
90 writel(HISI_SFC_V3XX_INT_MASK_ALL, host->regbase + HISI_SFC_V3XX_INT_MASK); in hisi_sfc_v3xx_enable_int()
95 writel(HISI_SFC_V3XX_INT_MASK_ALL, host->regbase + HISI_SFC_V3XX_INT_CLR); in hisi_sfc_v3xx_clear_int()
107 reg = readl(host->regbase + HISI_SFC_V3XX_RAW_INT_STAT); in hisi_sfc_v3xx_handle_completion()
140 return readl_poll_timeout(host->regbase + HISI_SFC_V3XX_CMD_CFG, reg, in hisi_sfc_v3xx_wait_cmd_idle()
203 from = host->regbase + HISI_SFC_V3XX_CMD_DATABUF0; in hisi_sfc_v3xx_read_databuf()
240 to = host->regbase + HISI_SFC_V3XX_CMD_DATABUF0; in hisi_sfc_v3xx_write_databuf()
308 writel(op->addr.val, host->regbase + HISI_SFC_V3XX_CMD_ADDR); in hisi_sfc_v3xx_start_bus()
309 writel(op->cmd.opcode, host->regbase + HISI_SFC_V3XX_CMD_INS); in hisi_sfc_v3xx_start_bus()
[all …]
/linux/drivers/clk/socfpga/
H A Dclk-gate-s10.c127 struct clk_hw *s10_register_gate(const struct stratix10_gate_clock *clks, void __iomem *regbase) in s10_register_gate() argument
139 socfpga_clk->hw.reg = regbase + clks->gate_reg; in s10_register_gate()
148 socfpga_clk->div_reg = regbase + clks->div_reg; in s10_register_gate()
156 socfpga_clk->bypass_reg = regbase + clks->bypass_reg; in s10_register_gate()
185 struct clk_hw *agilex_register_gate(const struct stratix10_gate_clock *clks, void __iomem *regbase) in agilex_register_gate() argument
197 socfpga_clk->hw.reg = regbase + clks->gate_reg; in agilex_register_gate()
206 socfpga_clk->div_reg = regbase + clks->div_reg; in agilex_register_gate()
214 socfpga_clk->bypass_reg = regbase + clks->bypass_reg; in agilex_register_gate()
243 struct clk_hw *agilex5_register_gate(const struct agilex5_gate_clock *clks, void __iomem *regbase) in agilex5_register_gate() argument
254 socfpga_clk->hw.reg = regbase + clks->gate_reg; in agilex5_register_gate()
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H A Dclk-periph-s10.c138 void __iomem *regbase) in n5x_register_periph() argument
151 periph_clk->hw.reg = regbase + clks->offset; in n5x_register_periph()
173 void __iomem *regbase) in s10_register_cnt_periph() argument
187 periph_clk->hw.reg = regbase + clks->offset; in s10_register_cnt_periph()
192 periph_clk->bypass_reg = regbase + clks->bypass_reg; in s10_register_cnt_periph()
219 void __iomem *regbase) in agilex5_register_cnt_periph() argument
232 periph_clk->hw.reg = regbase + clks->offset; in agilex5_register_cnt_periph()
237 periph_clk->bypass_reg = regbase + clks->bypass_reg; in agilex5_register_cnt_periph()
H A Dstratix10-clk.h122 void __iomem *regbase);
124 void __iomem *regbase);
/linux/drivers/ufs/host/
H A Dti-j721e-ufs.c19 void __iomem *regbase; member
35 ufs->regbase = devm_platform_ioremap_resource(pdev, 0); in ti_j721e_ufs_probe()
36 if (IS_ERR(ufs->regbase)) in ti_j721e_ufs_probe()
37 return PTR_ERR(ufs->regbase); in ti_j721e_ufs_probe()
58 writel(ufs->reg, ufs->regbase + TI_UFS_SS_CTRL); in ti_j721e_ufs_probe()
89 writel(ufs->reg, ufs->regbase + TI_UFS_SS_CTRL); in ti_j721e_ufs_resume()
/linux/arch/loongarch/pci/
H A Dpci.c114 void __iomem *crtc_reg, *base, *regbase; in loongson_gpu_fixup_dma_hang() local
120 regbase = ioremap(readq(base + PCI_BASE_ADDRESS_0) & ~0xffull, SZ_64K); in loongson_gpu_fixup_dma_hang()
121 if (!regbase) { in loongson_gpu_fixup_dma_hang()
128 crtc_reg = regbase + 0x1240; in loongson_gpu_fixup_dma_hang()
132 crtc_reg = regbase; in loongson_gpu_fixup_dma_hang()
136 iounmap(regbase); in loongson_gpu_fixup_dma_hang()
169 iounmap(regbase); in loongson_gpu_fixup_dma_hang()
/linux/drivers/gpio/
H A Dgpio-f7188x.c89 unsigned int regbase; member
183 .regbase = _regbase, \
302 dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase)); in f7188x_gpio_get_direction()
327 dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase)); in f7188x_gpio_direction_in()
333 superio_outb(sio->addr, f7188x_gpio_dir(bank->regbase), dir); in f7188x_gpio_direction_in()
352 dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase)); in f7188x_gpio_get()
355 data = superio_inb(sio->addr, f7188x_gpio_data_out(bank->regbase)); in f7188x_gpio_get()
357 data = superio_inb(sio->addr, f7188x_gpio_data_in(bank->regbase)); in f7188x_gpio_get()
377 data_out = superio_inb(sio->addr, f7188x_gpio_data_out(bank->regbase)); in f7188x_gpio_direction_out()
382 superio_outb(sio->addr, f7188x_gpio_data_out(bank->regbase), data_out); in f7188x_gpio_direction_out()
[all …]
/linux/drivers/clk/at91/
H A Dsckc.c372 void __iomem *regbase = of_iomap(np, 0); in at91sam9x5_sckc_register() local
383 if (!regbase) in at91sam9x5_sckc_register()
386 slow_rc = at91_clk_register_slow_rc_osc(regbase, "slow_rc_osc", in at91sam9x5_sckc_register()
412 slow_osc = at91_clk_register_slow_osc(regbase, "slow_osc", in at91sam9x5_sckc_register()
419 slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_hws, in at91sam9x5_sckc_register()
473 void __iomem *regbase = of_iomap(np, 0); in of_sam9x60_sckc_setup() local
484 if (!regbase) in of_sam9x60_sckc_setup()
499 slow_osc = at91_clk_register_slow_osc(regbase, "slow_osc", in of_sam9x60_sckc_setup()
519 hw = at91_clk_register_sam9x5_slow(regbase, "td_slck", parent_hws, in of_sam9x60_sckc_setup()
588 void __iomem *regbase = of_iomap(np, 0); in of_sama5d4_sckc_setup() local
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/linux/include/linux/comedi/
H A Dcomedi_8255.h34 unsigned long regbase);
38 unsigned long regbase) in subdev_8255_io_init() argument
45 unsigned long regbase);
/linux/include/linux/platform_data/
H A Dmv_usb.h36 int (*phy_init)(void __iomem *regbase);
37 void (*phy_deinit)(void __iomem *regbase);
/linux/drivers/pinctrl/
H A Dpinctrl-at91.c57 void __iomem *regbase; member
366 return gpio_chips[bank]->regbase; in pin_to_controller()
957 writel_relaxed(mask, at91_chip->regbase + PIO_PER); in at91_gpio_request_enable()
1420 void __iomem *pio = at91_gpio->regbase; in at91_gpio_get_direction()
1434 void __iomem *pio = at91_gpio->regbase; in at91_gpio_direction_input()
1444 void __iomem *pio = at91_gpio->regbase; in at91_gpio_get()
1455 void __iomem *pio = at91_gpio->regbase; in at91_gpio_set()
1467 void __iomem *pio = at91_gpio->regbase; in at91_gpio_set_multiple()
1484 void __iomem *pio = at91_gpio->regbase; in at91_gpio_direction_output()
1499 void __iomem *pio = at91_gpio->regbase; in at91_gpio_dbg_show()
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/linux/drivers/iommu/
H A Domap-iommu.h56 void __iomem *regbase; member
256 return __raw_readl(obj->regbase + offs); in iommu_read_reg()
261 __raw_writel(val, obj->regbase + offs); in iommu_write_reg()
/linux/drivers/platform/x86/amd/pmf/
H A Dcore.c151 return ioread32(dev->regbase + reg_offset); in amd_pmf_reg_read()
156 iowrite32(val, dev->regbase + reg_offset); in amd_pmf_reg_write()
201 rc = readx_poll_timeout(ioread32, dev->regbase + dev->smu_regs->resp_reg, in amd_pmf_send_cmd()
219 rc = readx_poll_timeout(ioread32, dev->regbase + dev->smu_regs->resp_reg, in amd_pmf_send_cmd()
513 dev->regbase = devm_ioremap(dev->dev, base_addr + AMD_PMF_BASE_ADDR_OFFSET, in amd_pmf_probe()
515 if (!dev->regbase) in amd_pmf_probe()
/linux/drivers/video/
H A Dvgastate.c34 static inline unsigned char vga_rcrtcs(void __iomem *regbase, unsigned short iobase, in vga_rcrtcs() argument
37 vga_w(regbase, iobase + 0x4, reg); in vga_rcrtcs()
38 return vga_r(regbase, iobase + 0x5); in vga_rcrtcs()
41 static inline void vga_wcrtcs(void __iomem *regbase, unsigned short iobase, in vga_wcrtcs() argument
44 vga_w(regbase, iobase + 0x4, reg); in vga_wcrtcs()
45 vga_w(regbase, iobase + 0x5, val); in vga_wcrtcs()
/linux/sound/soc/fsl/
H A Dfsl_easrc.c60 ret = (easrc_priv->bps_iec958[mc->regbase] != regval); in fsl_easrc_iec958_put_bits()
62 easrc_priv->bps_iec958[mc->regbase] = regval; in fsl_easrc_iec958_put_bits()
76 ucontrol->value.integer.value[0] = easrc_priv->bps_iec958[mc->regbase]; in fsl_easrc_iec958_get_bits()
99 ret = regmap_read(easrc->regmap, REG_EASRC_CS0(mc->regbase), &regval[0]); in fsl_easrc_get_reg()
103 ret = regmap_read(easrc->regmap, REG_EASRC_CS1(mc->regbase), &regval[1]); in fsl_easrc_get_reg()
107 ret = regmap_read(easrc->regmap, REG_EASRC_CS2(mc->regbase), &regval[2]); in fsl_easrc_get_reg()
111 ret = regmap_read(easrc->regmap, REG_EASRC_CS3(mc->regbase), &regval[3]); in fsl_easrc_get_reg()
115 ret = regmap_read(easrc->regmap, REG_EASRC_CS4(mc->regbase), &regval[4]); in fsl_easrc_get_reg()
119 ret = regmap_read(easrc->regmap, REG_EASRC_CS5(mc->regbase), &regval[5]); in fsl_easrc_get_reg()
141 ret = regmap_update_bits_check(easrc->regmap, REG_EASRC_CS0(mc->regbase), in fsl_easrc_set_reg()
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