Searched refs:reg_val_offs (Results 1 – 5 of 5) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_gfx.c | 1117 uint32_t seq, reg_val_offs = 0, value = 0; in amdgpu_kiq_rreg() local
1130 if (amdgpu_device_wb_get(adev, ®_val_offs)) { in amdgpu_kiq_rreg()
1138 amdgpu_ring_emit_rreg(ring, reg, reg_val_offs); in amdgpu_kiq_rreg()
1172 value = adev->wb.wb[reg_val_offs]; in amdgpu_kiq_rreg()
1173 amdgpu_device_wb_free(adev, reg_val_offs); in amdgpu_kiq_rreg()
1181 if (reg_val_offs) in amdgpu_kiq_rreg()
1182 amdgpu_device_wb_free(adev, reg_val_offs); in amdgpu_kiq_rreg()
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| H A D | gfx_v9_0.c | 4203 uint32_t seq, reg_val_offs = 0; in gfx_v9_0_kiq_read_clock() local
4211 if (amdgpu_device_wb_get(adev, ®_val_offs)) { in gfx_v9_0_kiq_read_clock()
4224 reg_val_offs * 4)); in gfx_v9_0_kiq_read_clock()
4226 reg_val_offs * 4)); in gfx_v9_0_kiq_read_clock()
4257 value = (uint64_t)adev->wb.wb[reg_val_offs] | in gfx_v9_0_kiq_read_clock()
4258 (uint64_t)adev->wb.wb[reg_val_offs + 1 ] << 32ULL; in gfx_v9_0_kiq_read_clock()
4259 amdgpu_device_wb_free(adev, reg_val_offs); in gfx_v9_0_kiq_read_clock()
4267 if (reg_val_offs) in gfx_v9_0_kiq_read_clock()
4268 amdgpu_device_wb_free(adev, reg_val_offs); in gfx_v9_0_kiq_read_clock()
5875 uint32_t reg_val_offs) in gfx_v9_0_ring_emit_rreg() argument
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| H A D | gfx_v12_1.c | 3479 uint32_t reg_val_offs) in gfx_v12_1_ring_emit_rreg() argument
3492 reg_val_offs * 4)); in gfx_v12_1_ring_emit_rreg()
3494 reg_val_offs * 4)); in gfx_v12_1_ring_emit_rreg()
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| H A D | gfx_v12_0.c | 4665 uint32_t reg_val_offs) in gfx_v12_0_ring_emit_rreg() argument
4676 reg_val_offs * 4)); in gfx_v12_0_ring_emit_rreg()
4678 reg_val_offs * 4)); in gfx_v12_0_ring_emit_rreg()
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| H A D | gfx_v11_0.c | 6326 uint32_t reg_val_offs) in gfx_v11_0_ring_emit_rreg() argument
6337 reg_val_offs * 4)); in gfx_v11_0_ring_emit_rreg()
6339 reg_val_offs * 4)); in gfx_v11_0_ring_emit_rreg()
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