Searched refs:reg_val_offs (Results 1 – 9 of 9) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_gfx.c | 1031 uint32_t seq, reg_val_offs = 0, value = 0; in amdgpu_kiq_rreg() local
1044 if (amdgpu_device_wb_get(adev, ®_val_offs)) { in amdgpu_kiq_rreg()
1052 amdgpu_ring_emit_rreg(ring, reg, reg_val_offs); in amdgpu_kiq_rreg()
1083 value = adev->wb.wb[reg_val_offs]; in amdgpu_kiq_rreg()
1084 amdgpu_device_wb_free(adev, reg_val_offs); in amdgpu_kiq_rreg()
1092 if (reg_val_offs) in amdgpu_kiq_rreg()
1093 amdgpu_device_wb_free(adev, reg_val_offs); in amdgpu_kiq_rreg()
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| H A D | amdgpu_virt.h | 251 uint32_t reg_val_offs; member
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| H A D | gfx_v9_0.c | 4204 uint32_t seq, reg_val_offs = 0; in gfx_v9_0_kiq_read_clock() local
4212 if (amdgpu_device_wb_get(adev, ®_val_offs)) { in gfx_v9_0_kiq_read_clock()
4225 reg_val_offs * 4)); in gfx_v9_0_kiq_read_clock()
4227 reg_val_offs * 4)); in gfx_v9_0_kiq_read_clock()
4258 value = (uint64_t)adev->wb.wb[reg_val_offs] | in gfx_v9_0_kiq_read_clock()
4259 (uint64_t)adev->wb.wb[reg_val_offs + 1 ] << 32ULL; in gfx_v9_0_kiq_read_clock()
4260 amdgpu_device_wb_free(adev, reg_val_offs); in gfx_v9_0_kiq_read_clock()
4268 if (reg_val_offs) in gfx_v9_0_kiq_read_clock()
4269 amdgpu_device_wb_free(adev, reg_val_offs); in gfx_v9_0_kiq_read_clock()
5904 uint32_t reg_val_offs) in gfx_v9_0_ring_emit_rreg() argument
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| H A D | amdgpu_ring.h | 221 uint32_t reg_val_offs);
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| H A D | gfx_v9_4_3.c | 3017 uint32_t reg_val_offs) in gfx_v9_4_3_ring_emit_rreg() argument
3030 reg_val_offs * 4)); in gfx_v9_4_3_ring_emit_rreg()
3032 reg_val_offs * 4)); in gfx_v9_4_3_ring_emit_rreg()
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| H A D | gfx_v12_0.c | 4594 uint32_t reg_val_offs) in gfx_v12_0_ring_emit_rreg() argument
4605 reg_val_offs * 4)); in gfx_v12_0_ring_emit_rreg()
4607 reg_val_offs * 4)); in gfx_v12_0_ring_emit_rreg()
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| H A D | gfx_v8_0.c | 6363 uint32_t reg_val_offs) in gfx_v8_0_ring_emit_rreg() argument
6374 reg_val_offs * 4)); in gfx_v8_0_ring_emit_rreg()
6376 reg_val_offs * 4)); in gfx_v8_0_ring_emit_rreg()
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| H A D | gfx_v11_0.c | 6095 uint32_t reg_val_offs) in gfx_v11_0_ring_emit_rreg() argument
6106 reg_val_offs * 4)); in gfx_v11_0_ring_emit_rreg()
6108 reg_val_offs * 4)); in gfx_v11_0_ring_emit_rreg()
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| H A D | gfx_v10_0.c | 8924 uint32_t reg_val_offs) in gfx_v10_0_ring_emit_rreg() argument
8935 reg_val_offs * 4)); in gfx_v10_0_ring_emit_rreg()
8937 reg_val_offs * 4)); in gfx_v10_0_ring_emit_rreg()
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