Searched refs:reg_tbl (Results 1 – 9 of 9) sorted by relevance
39 readl(((a)->ahw->pci_base0) + ((a)->ahw->reg_tbl[addr]))43 writel(value, ((a)->ahw->pci_base0) + ((a)->ahw->reg_tbl[addr]))
530 u32 *reg_tbl; member
263 ahw->reg_tbl = (u32 *)qlcnic_83xx_reg_tbl; in qlcnic_83xx_register_map()3616 sizeof(*adapter->ahw->reg_tbl)); in qlcnic_83xx_get_regs_len()
666 ahw->reg_tbl = (u32 *)qlcnic_83xx_reg_tbl; in qlcnic_sriov_vf_register_map()
2456 ahw->reg_tbl = (u32 *) qlcnic_reg_tbl; in qlcnic_probe()
817 uint32_t *reg_tbl; member1057 return ha->isp_ops->rd_reg_direct(ha, ha->reg_tbl[crb_reg]); in qla4_8xxx_rd_direct()1064 ha->isp_ops->wr_reg_direct(ha, ha->reg_tbl[crb_reg], value); in qla4_8xxx_wr_direct()
453 ha->reg_tbl[QLA8XXX_CRB_DEV_PART_INFO]); in qla4_83xx_can_perform_reset()455 drv_active = qla4_83xx_rd_reg(ha, ha->reg_tbl[QLA8XXX_CRB_DRV_ACTIVE]); in qla4_83xx_can_perform_reset()
8665 ha->reg_tbl = (uint32_t *) qla4_82xx_reg_tbl; in qla4xxx_probe_adapter()8677 ha->reg_tbl = (uint32_t *)qla4_83xx_reg_tbl; in qla4xxx_probe_adapter()
13176 } reg_tbl[] = { in tg3_test_registers() local13319 for (i = 0; reg_tbl[i].offset != 0xffff; i++) { in tg3_test_registers()13320 if (is_5705 && (reg_tbl[i].flags & TG3_FL_NOT_5705)) in tg3_test_registers()13323 if (!is_5705 && (reg_tbl[i].flags & TG3_FL_5705)) in tg3_test_registers()13327 (reg_tbl[i].flags & TG3_FL_NOT_5788)) in tg3_test_registers()13330 if (is_5750 && (reg_tbl[i].flags & TG3_FL_NOT_5750)) in tg3_test_registers()13333 offset = (u32) reg_tbl[i].offset; in tg3_test_registers()13334 read_mask = reg_tbl[i].read_mask; in tg3_test_registers()13335 write_mask = reg_tbl[i].write_mask; in tg3_test_registers()