Home
last modified time | relevance | path

Searched refs:reg_set (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/scsi/mvsas/
H A Dmv_sas.h64 #define SATA_RECEIVED_FIS_LIST(reg_set) \ argument
65 ((void *) mvi->rx_fis + mvi->chip->fis_offs + 0x100 * reg_set)
66 #define SATA_RECEIVED_SDB_FIS(reg_set) \ argument
67 (SATA_RECEIVED_FIS_LIST(reg_set) + 0x58)
68 #define SATA_RECEIVED_D2H_FIS(reg_set) \ argument
69 (SATA_RECEIVED_FIS_LIST(reg_set) + 0x40)
70 #define SATA_RECEIVED_PIO_FIS(reg_set) \ argument
71 (SATA_RECEIVED_FIS_LIST(reg_set) + 0x20)
72 #define SATA_RECEIVED_DMA_FIS(reg_set) \ argument
73 (SATA_RECEIVED_FIS_LIST(reg_set) + 0x00)
[all …]
H A Dmv_94xx.c667 mvs_94xx_clear_srs_irq(struct mvs_info *mvi, u8 reg_set, u8 clear_all) in mvs_94xx_clear_srs_irq() argument
684 if (reg_set > 31) in mvs_94xx_clear_srs_irq()
689 if (tmp & (1 << (reg_set % 32))) { in mvs_94xx_clear_srs_irq()
690 mv_dprintk("register set 0x%x was stopped.\n", reg_set); in mvs_94xx_clear_srs_irq()
691 if (reg_set > 31) in mvs_94xx_clear_srs_irq()
692 mw32(MVS_INT_STAT_SRS_1, 1 << (reg_set % 32)); in mvs_94xx_clear_srs_irq()
694 mw32(MVS_INT_STAT_SRS_0, 1 << (reg_set % 32)); in mvs_94xx_clear_srs_irq()
744 u8 reg_set = *tfs; in mvs_94xx_free_reg_set() local
749 mvi->sata_reg_set &= ~bit(reg_set); in mvs_94xx_free_reg_set()
750 if (reg_set < 32) in mvs_94xx_free_reg_set()
[all …]
H A Dmv_64xx.c124 mvs_64xx_clear_srs_irq(struct mvs_info *mvi, u8 reg_set, u8 clear_all) in mvs_64xx_clear_srs_irq() argument
136 if (tmp & (1 << (reg_set % 32))) { in mvs_64xx_clear_srs_irq()
138 reg_set); in mvs_64xx_clear_srs_irq()
139 mw32(MVS_INT_STAT_SRS_0, 1 << (reg_set % 32)); in mvs_64xx_clear_srs_irq()
H A Dmv_sas.c121 u8 reg_set) in mvs_find_dev_by_reg_set() argument
128 if (mvi->devices[dev_no].taskfileset == reg_set) in mvs_find_dev_by_reg_set()
/linux/drivers/leds/
H A Dleds-tca6507.c154 int reg_set; /* One bit per register where member
269 tca->reg_set |= (1 << bit); in set_select()
290 tca->reg_set |= 1 << reg; in set_code()
351 set = tca->reg_set; in tca6507_work()
353 tca->reg_set = 0; in tca6507_work()
537 if (tca->reg_set) in led_assign()
605 if (tca->reg_set) in tca6507_gpio_set_value()
763 tca->reg_set = 0x7f; in tca6507_probe()
/linux/drivers/scsi/megaraid/
H A Dmegaraid_sas_base.c229 struct megasas_register_set __iomem *reg_set);
307 cmd->frame_phys_addr, 0, instance->reg_set); in megasas_issue_dcmd()
462 regs = instance->reg_set; in megasas_enable_intr_xscale()
479 regs = instance->reg_set; in megasas_disable_intr_xscale()
492 return readl(&instance->reg_set->outbound_msg_0); in megasas_read_fw_status_reg_xscale()
504 regs = instance->reg_set; in megasas_clear_intr_xscale()
642 regs = instance->reg_set; in megasas_enable_intr_ppc()
661 regs = instance->reg_set; in megasas_disable_intr_ppc()
674 return readl(&instance->reg_set->outbound_scratch_pad_0); in megasas_read_fw_status_reg_ppc()
686 regs = instance->reg_set; in megasas_clear_intr_ppc()
[all …]
H A Dmegaraid_sas_fusion.c107 (instance, instance->reg_set)) in megasas_adp_reset_wait_for_ready()
168 regs = instance->reg_set; in megasas_enable_intr_fusion()
191 regs = instance->reg_set; in megasas_disable_intr_fusion()
205 regs = instance->reg_set; in megasas_clear_intr_fusion()
299 writeq(req_data, &instance->reg_set->inbound_low_queue_port); in megasas_write_64bit_req_desc()
304 &instance->reg_set->inbound_low_queue_port); in megasas_write_64bit_req_desc()
306 &instance->reg_set->inbound_high_queue_port); in megasas_write_64bit_req_desc()
325 &instance->reg_set->inbound_single_queue_port); in megasas_fire_cmd_fusion()
351 &instance->reg_set->outbound_scratch_pad_2) & 0x00FFFF; in megasas_fusion_update_can_queue()
1105 (instance, &instance->reg_set->outbound_scratch_pad_1); in megasas_ioc_init_fusion()
[all …]
H A Dmegaraid_sas.h2337 struct megasas_register_set __iomem *reg_set; member
/linux/drivers/gpu/drm/bridge/
H A Dtda998x_drv.c690 reg_set(struct tda998x_priv *priv, u16 reg, u8 val) in reg_set() function
719 reg_set(priv, REG_MAIN_CNTRL0, MAIN_CNTRL0_SR); in tda998x_reset()
847 reg_set(priv, REG_DIP_IF_FLAGS, bit); in tda998x_write_if()
998 reg_set(priv, REG_SOFTRESET, SOFTRESET_AUDIO); in tda998x_audio_mute()
1000 reg_set(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO); in tda998x_audio_mute()
1045 reg_set(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_CTS); in tda998x_configure_audio()
1305 reg_set(priv, REG_TX4, TX4_PD_RAM); in tda998x_connector_get_modes()
1551 reg_set(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO); in tda998x_bridge_mode_set()
1561 reg_set(priv, REG_FEAT_POWERDOWN, FEAT_POWERDOWN_PREFILT); in tda998x_bridge_mode_set()
1594 reg_set(priv, REG_FEAT_POWERDOWN, FEAT_POWERDOWN_CSC); in tda998x_bridge_mode_set()
[all …]
/linux/drivers/media/i2c/
H A Dak881x.c46 static int reg_set(struct i2c_client *client, const u8 reg, in reg_set() function
172 reg_set(client, AK881X_VIDEO_PROCESS1, vp1, 0xf); in ak881x_s_std_output()
/linux/drivers/media/platform/st/stm32/stm32-dcmipp/
H A Ddcmipp-input.c368 reg_set(inp, DCMIPP_PRCR, DCMIPP_PRCR_ENABLE); in dcmipp_inp_configure_parallel()
400 reg_set(inp, DCMIPP_P0FSCR, in dcmipp_inp_configure_csi()
403 reg_set(inp, DCMIPP_P0FSCR, in dcmipp_inp_configure_csi()
H A Ddcmipp-bytecap.c372 reg_set(vcap, DCMIPP_P0FCTCR, DCMIPP_P0FCTCR_CPTREQ); in dcmipp_start_capture()
432 reg_set(vcap, DCMIPP_P0FSCR, DCMIPP_P0FSCR_PIPEN); in dcmipp_bytecap_start_streaming()
445 reg_set(vcap, DCMIPP_CMIER, DCMIPP_CMIER_P0ALL); in dcmipp_bytecap_start_streaming()
H A Ddcmipp-byteproc.c456 reg_set(byteproc, DCMIPP_P0PPCR, val); in dcmipp_byteproc_configure_scale_crop()
/linux/drivers/i3c/master/mipi-i3c-hci/
H A Dhci.h29 #define reg_set(r, v) reg_write(r, reg_read(r) | (v)) macro
H A Dcore.c155 reg_set(HC_CONTROL, HC_CONTROL_BUS_ENABLE); in i3c_hci_bus_init()
200 reg_set(HC_CONTROL, HC_CONTROL_RESUME); in mipi_i3c_hci_resume()
644 reg_set(HC_CONTROL, HC_CONTROL_PIO_MODE); in i3c_hci_set_io_mode()
767 reg_set(HC_CONTROL, HC_CONTROL_BUS_ENABLE); in i3c_hci_runtime_resume()
/linux/arch/arm/net/
H A Dbpf_jit_32.c1517 u16 reg_set = 0; in emit_push_r64() local
1521 reg_set = (1 << rt[1]) | (1 << rt[0]); in emit_push_r64()
1522 emit(ARM_PUSH(reg_set), ctx); in emit_push_r64()
1534 u16 reg_set = CALLEE_PUSH_MASK | 1 << ARM_IP | 1 << ARM_PC; in build_prologue() local
1536 emit(ARM_PUSH(reg_set), ctx); in build_prologue()
1571 u16 reg_set = CALLEE_POP_MASK | 1 << ARM_SP; in build_epilogue() local
1572 emit(ARM_SUB_I(ARM_SP, ARM_FP, hweight16(reg_set) * 4), ctx); in build_epilogue()
1573 emit(ARM_LDM(ARM_SP, reg_set), ctx); in build_epilogue()
/linux/drivers/gpu/drm/i915/
H A Dintel_uncore.c135 #define fw_set(d, val) writel(_MASKED_BIT_ENABLE((val)), (d)->reg_set)
136 #define fw_clear(d, val) writel(_MASKED_BIT_DISABLE((val)), (d)->reg_set)
2067 i915_reg_t reg_set, in __fw_domain_init() argument
2079 drm_WARN_ON(&uncore->i915->drm, !i915_mmio_reg_valid(reg_set)); in __fw_domain_init()
2084 d->reg_set = uncore->regs + i915_mmio_reg_offset(reg_set) + uncore->gsi_offset; in __fw_domain_init()
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_link.c3634 static struct bnx2x_reg_set reg_set[] = { in bnx2x_warpcore_enable_AN_KR2() local
3658 for (i = 0; i < ARRAY_SIZE(reg_set); i++) in bnx2x_warpcore_enable_AN_KR2()
3659 bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, in bnx2x_warpcore_enable_AN_KR2()
3660 reg_set[i].val); in bnx2x_warpcore_enable_AN_KR2()
3673 static struct bnx2x_reg_set reg_set[] = { in bnx2x_disable_kr2() local
3693 for (i = 0; i < ARRAY_SIZE(reg_set); i++) in bnx2x_disable_kr2()
3694 bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, in bnx2x_disable_kr2()
3695 reg_set[i].val); in bnx2x_disable_kr2()
3735 static struct bnx2x_reg_set reg_set[] = { in bnx2x_warpcore_enable_AN_KR() local
3747 for (i = 0; i < ARRAY_SIZE(reg_set); i++) in bnx2x_warpcore_enable_AN_KR()
[all …]
/linux/kernel/bpf/
H A Dverifier.c17286 static void __collect_linked_regs(struct linked_regs *reg_set, struct bpf_reg_state *reg, in __collect_linked_regs() argument
17294 e = linked_regs_push(reg_set); in __collect_linked_regs()