/linux/arch/x86/pci/ |
H A D | ce4100.c | 55 static void reg_read(struct sim_dev_reg *reg, u32 *value) in reg_read() function 75 reg_read(reg, value); in ehci_reg_read() 88 reg_read(reg, value); in sata_revid_read() 98 DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write) 99 DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write) 100 DEFINE_REG(2, 1, 0x10, (64*KB), reg_init, reg_read, reg_write) 101 DEFINE_REG(3, 0, 0x10, (64*KB), reg_init, reg_read, reg_write) 102 DEFINE_REG(4, 0, 0x10, (128*KB), reg_init, reg_read, reg_write) 103 DEFINE_REG(4, 1, 0x10, (128*KB), reg_init, reg_read, reg_write) 104 DEFINE_REG(6, 0, 0x10, (512*KB), reg_init, reg_read, reg_write) [all …]
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/linux/drivers/base/regmap/ |
H A D | regmap-mmio.c | 27 unsigned int (*reg_read)(struct regmap_mmio_context *ctx, member 322 *val = ctx->reg_read(ctx, reg); in regmap_mmio_read() 400 .reg_read = regmap_mmio_read, 450 ctx->reg_read = regmap_mmio_ioread8; in regmap_mmio_gen_context() 453 ctx->reg_read = regmap_mmio_read8_relaxed; in regmap_mmio_gen_context() 456 ctx->reg_read = regmap_mmio_read8; in regmap_mmio_gen_context() 462 ctx->reg_read = regmap_mmio_ioread16le; in regmap_mmio_gen_context() 465 ctx->reg_read = regmap_mmio_read16le_relaxed; in regmap_mmio_gen_context() 468 ctx->reg_read = regmap_mmio_read16le; in regmap_mmio_gen_context() 474 ctx->reg_read = regmap_mmio_ioread32le; in regmap_mmio_gen_context() [all …]
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H A D | regmap-fsi.c | 37 .reg_read = regmap_fsi32_reg_read, 62 .reg_read = regmap_fsi32le_reg_read, 91 .reg_read = regmap_fsi16_reg_read, 120 .reg_read = regmap_fsi16le_reg_read, 149 .reg_read = regmap_fsi8_reg_read,
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H A D | regmap-w1.c | 176 .reg_read = w1_reg_a8_v8_read, 181 .reg_read = w1_reg_a8_v16_read, 186 .reg_read = w1_reg_a16_v16_read,
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H A D | regmap-mdio.c | 42 .reg_read = regmap_mdio_c22_read, 82 .reg_read = regmap_mdio_c45_read,
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/linux/sound/i2c/other/ |
H A D | ak4113.c | 37 static inline unsigned char reg_read(struct ak4113 *ak4113, unsigned char reg) in reg_read() function 83 chip->rcs0 = reg_read(chip, AK4113_REG_RCS0) & ~(AK4113_QINT | in snd_ak4113_create() 85 chip->rcs1 = reg_read(chip, AK4113_REG_RCS1); in snd_ak4113_create() 86 chip->rcs2 = reg_read(chip, AK4113_REG_RCS2); in snd_ak4113_create() 207 ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv; in snd_ak4113_in_bit_get() 264 ucontrol->value.integer.value[0] = external_rate(reg_read(chip, in snd_ak4113_rate_get() 284 ucontrol->value.iec958.status[i] = reg_read(chip, in snd_ak4113_spdif_get() 322 tmp = reg_read(chip, AK4113_REG_Pc0) | in snd_ak4113_spdif_pget() 323 (reg_read(chip, AK4113_REG_Pc1) << 8); in snd_ak4113_spdif_pget() 325 tmp = reg_read(chip, AK4113_REG_Pd0) | in snd_ak4113_spdif_pget() [all …]
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H A D | ak4117.c | 32 static inline unsigned char reg_read(struct ak4117 *ak4117, unsigned char reg) in reg_read() function 74 chip->rcs0 = reg_read(chip, AK4117_REG_RCS0) & ~(AK4117_QINT | AK4117_CINT | AK4117_STC); in snd_ak4117_create() 75 chip->rcs1 = reg_read(chip, AK4117_REG_RCS1); in snd_ak4117_create() 76 chip->rcs2 = reg_read(chip, AK4117_REG_RCS2); in snd_ak4117_create() 165 ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv; in snd_ak4117_in_bit_get() 219 ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4117_REG_RCS1)); in snd_ak4117_rate_get() 237 ucontrol->value.iec958.status[i] = reg_read(chip, AK4117_REG_RXCSB0 + i); in snd_ak4117_spdif_get() 272 tmp = reg_read(chip, AK4117_REG_Pc0) | (reg_read(chip, AK4117_REG_Pc1) << 8); in snd_ak4117_spdif_pget() 274 tmp = reg_read(chip, AK4117_REG_Pd0) | (reg_read(chip, AK4117_REG_Pd1) << 8); in snd_ak4117_spdif_pget() 293 ucontrol->value.bytes.data[i] = reg_read(chip, AK4117_REG_QSUB_ADDR + i); in snd_ak4117_spdif_qget() [all …]
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H A D | ak4114.c | 36 static inline unsigned char reg_read(struct ak4114 *ak4114, unsigned char reg) in reg_read() function 86 chip->rcs0 = reg_read(chip, AK4114_REG_RCS0) & ~(AK4114_QINT | AK4114_CINT); in snd_ak4114_create() 87 chip->rcs1 = reg_read(chip, AK4114_REG_RCS1); in snd_ak4114_create() 191 ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv; in snd_ak4114_in_bit_get() 210 ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4114_REG_RCS1)); in snd_ak4114_rate_get() 228 ucontrol->value.iec958.status[i] = reg_read(chip, AK4114_REG_RXCSB0 + i); in snd_ak4114_spdif_get() 285 tmp = reg_read(chip, AK4114_REG_Pc0) | (reg_read(chip, AK4114_REG_Pc1) << 8); in snd_ak4114_spdif_pget() 287 tmp = reg_read(chip, AK4114_REG_Pd0) | (reg_read(chip, AK4114_REG_Pd1) << 8); in snd_ak4114_spdif_pget() 306 ucontrol->value.bytes.data[i] = reg_read(chip, AK4114_REG_QSUB_ADDR + i); in snd_ak4114_spdif_qget() 436 val = reg_read(ak4114, reg); in snd_ak4114_proc_regs_read() [all …]
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/linux/drivers/firewire/ |
H A D | init_ohci1394_dma.c | 45 static inline u32 reg_read(const struct ohci *ohci, int offset) in reg_read() function 61 if (reg_read(ohci, OHCI1394_PhyControl) & 0x80000000) in get_phy_reg() 65 r = reg_read(ohci, OHCI1394_PhyControl); in get_phy_reg() 78 if (!(reg_read(ohci, OHCI1394_PhyControl) & 0x00004000)) in set_phy_reg() 92 if (!(reg_read(ohci, OHCI1394_HCControlSet) in init_ohci1394_soft_reset() 110 bus_options = reg_read(ohci, OHCI1394_BusOptions); in init_ohci1394_initialize() 183 events = reg_read(ohci, OHCI1394_IntEventSet); in init_ohci1394_wait_for_busresets()
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H A D | ohci.c | 617 static inline u32 reg_read(const struct fw_ohci *ohci, int offset) in reg_read() function 625 reg_read(ohci, OHCI1394_Version); in flush_writes() 641 val = reg_read(ohci, OHCI1394_PhyControl); in read_phy_reg() 668 val = reg_read(ohci, OHCI1394_PhyControl); in write_phy_reg() 775 if (reg_read(ohci, CONTROL_CLEAR(ctx->regs)) & CONTEXT_RUN) { in ar_context_abort() 1371 reg = reg_read(ohci, CONTROL_SET(ctx->regs)); in context_stop() 1685 if (reg_read(ohci, OHCI1394_CSRControl) & 0x80000000) { in handle_local_lock() 1686 lock_old = cpu_to_be32(reg_read(ohci, in handle_local_lock() 1773 ctl = reg_read(ohci, CONTROL_SET(regs)); in detect_dead_context() 1839 c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); in get_cycle_time() [all …]
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/linux/drivers/media/pci/tw686x/ |
H A D | tw686x-core.c | 95 u32 dma_en = reg_read(dev, DMA_CHANNEL_ENABLE); in tw686x_disable_channel() 96 u32 dma_cmd = reg_read(dev, DMA_CMD); in tw686x_disable_channel() 114 u32 dma_en = reg_read(dev, DMA_CHANNEL_ENABLE); in tw686x_enable_channel() 115 u32 dma_cmd = reg_read(dev, DMA_CMD); in tw686x_enable_channel() 145 dma_en = reg_read(dev, DMA_CHANNEL_ENABLE); in tw686x_reset_channels() 146 dma_cmd = reg_read(dev, DMA_CMD); in tw686x_reset_channels() 173 int_status = reg_read(dev, INT_STATUS); /* cleared on read */ in tw686x_irq() 174 fifo_status = reg_read(dev, VIDEO_FIFO_STATUS); in tw686x_irq() 188 dma_en = reg_read(dev, DMA_CHANNEL_ENABLE); in tw686x_irq() 200 pb_status = reg_read(dev, PB_STATUS); in tw686x_irq()
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/linux/drivers/media/i2c/ |
H A D | ak881x.c | 35 static int reg_read(struct i2c_client *client, const u8 reg) in reg_read() function 49 int ret = reg_read(client, reg); in reg_set() 70 reg->val = reg_read(client, reg->reg); in ak881x_g_register() 193 reg_read(client, AK881X_STATUS)); in ak881x_s_stream() 198 reg_read(client, AK881X_STATUS)); in ak881x_s_stream() 247 data = reg_read(client, AK881X_DEVICE_ID); in ak881x_probe() 259 ak881x->revision = reg_read(client, AK881X_DEVICE_REVISION); in ak881x_probe()
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/linux/drivers/media/usb/gspca/ |
H A D | spca508.c | 1250 static int reg_read(struct gspca_dev *gspca_dev, in reg_read() function 1297 ret = reg_read(gspca_dev, 0x8803); in ssi_w() 1358 data1 = reg_read(gspca_dev, 0x8104); in sd_config() 1359 data2 = reg_read(gspca_dev, 0x8105); in sd_config() 1363 data1 = reg_read(gspca_dev, 0x8106); in sd_config() 1364 data2 = reg_read(gspca_dev, 0x8107); in sd_config() 1368 data1 = reg_read(gspca_dev, 0x8621); in sd_config()
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/linux/drivers/soundwire/ |
H A D | qcom.c | 208 int (*reg_read)(struct qcom_swrm_ctrl *ctrl, int reg, u32 *val); member 359 ctrl->reg_read(ctrl, ctrl->reg_layout[SWRM_REG_CMD_FIFO_STATUS], in swrm_wait_for_rd_fifo_avail() 385 ctrl->reg_read(ctrl, ctrl->reg_layout[SWRM_REG_CMD_FIFO_STATUS], in swrm_wait_for_wr_fifo_avail() 410 ctrl->reg_read(ctrl, ctrl->reg_layout[SWRM_REG_CMD_FIFO_STATUS], &value); in swrm_wait_for_wr_fifo_done() 416 ctrl->reg_read(ctrl, ctrl->reg_layout[SWRM_REG_CMD_FIFO_STATUS], &value); in swrm_wait_for_wr_fifo_done() 502 ctrl->reg_read(ctrl, ctrl->reg_layout[SWRM_REG_CMD_FIFO_RD_FIFO_ADDR], in qcom_swrm_cmd_fifo_rd_cmd() 536 ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &val); in qcom_swrm_get_alert_slave_dev_num() 555 ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &val); in qcom_swrm_get_device_status() 573 ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &status); in qcom_swrm_set_slave_dev_num() 603 ctrl->reg_read(ctrl, SWRM_ENUMERATOR_SLAVE_DEV_ID_1(i), &val1); in qcom_swrm_enumerate() [all …]
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/linux/drivers/i3c/master/mipi-i3c-hci/ |
H A D | core.c | 152 DBG("HC_CONTROL = %#x", reg_read(HC_CONTROL)); in i3c_hci_bus_init() 594 val = reg_read(INTR_STATUS); in i3c_hci_irq_handler() 627 regval = reg_read(HCI_VERSION); in i3c_hci_init() 644 hci->caps = reg_read(HC_CAPABILITIES); in i3c_hci_init() 650 regval = reg_read(DAT_SECTION); in i3c_hci_init() 660 regval = reg_read(DCT_SECTION); in i3c_hci_init() 670 regval = reg_read(RING_HEADERS_SECTION); in i3c_hci_init() 675 regval = reg_read(PIO_SECTION); in i3c_hci_init() 680 regval = reg_read(EXT_CAPS_SECTION); in i3c_hci_init() 694 ret = readx_poll_timeout(reg_read, RESET_CONTROL, regval, in i3c_hci_init() [all …]
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H A D | hci_quirks.c | 31 data = reg_read(HCI_SDA_HOLD_SWITCH_DLY_TIMING); in amd_set_od_pp_timing() 41 data = reg_read(QUEUE_THLD_CTRL); in amd_set_resp_buf_thld()
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/linux/drivers/nvmem/ |
H A D | imx-ocotp-ele.c | 35 nvmem_reg_read_t reg_read; member 133 priv->config.reg_read = priv->data->reg_read; in imx_ele_ocotp_probe() 149 .reg_read = imx_ocotp_reg_read, 164 .reg_read = imx_ocotp_reg_read,
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H A D | rockchip-otp.c | 74 nvmem_reg_read_t reg_read; member 239 if (!otp->data || !otp->data->reg_read) in rockchip_otp_read() 248 ret = otp->data->reg_read(context, offset, val, bytes); in rockchip_otp_read() 263 .reg_read = rockchip_otp_read, 274 .reg_read = px30_otp_read, 285 .reg_read = rk3588_otp_read,
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H A D | sunxi_sid.c | 163 nvmem_cfg->reg_read = sun8i_sid_read_by_reg; in sunxi_sid_probe() 165 nvmem_cfg->reg_read = sunxi_sid_read; in sunxi_sid_probe() 175 nvmem_cfg->reg_read(sid, 0, randomness, size); in sunxi_sid_probe()
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/linux/drivers/i2c/busses/ |
H A D | i2c-pasemi-core.c | 51 static inline int reg_read(struct pasemi_smbus *smbus, int reg) in reg_read() function 60 #define RXFIFO_RD(smbus) reg_read((smbus), REG_MRXFIFO) 77 status = reg_read(smbus, REG_SMSTA); in pasemi_smb_clear() 91 status = reg_read(smbus, REG_SMSTA); in pasemi_smb_waitready() 93 status = reg_read(smbus, REG_SMSTA); in pasemi_smb_waitready() 96 status = reg_read(smbus, REG_SMSTA); in pasemi_smb_waitready() 360 smbus->hw_rev = reg_read(smbus, REG_REV); in pasemi_i2c_common_probe()
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/linux/drivers/media/platform/st/stm32/dma2d/ |
H A D | dma2d-hw.c | 19 static inline u32 reg_read(void __iomem *base, u32 reg) in reg_read() function 32 reg_write(base, reg, (reg_read(base, reg) & ~mask) | val); in reg_update_bits() 42 return reg_read(d->regs, DMA2D_ISR_REG); in dma2d_get_int() 47 u32 isr_val = reg_read(d->regs, DMA2D_ISR_REG); in dma2d_clear_int()
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/linux/drivers/media/tuners/ |
H A D | mxl301rf.c | 52 static int reg_read(struct mxl301rf_state *state, u8 reg, u8 *val) in reg_read() function 88 ret = reg_read(state, 0x18, &rf_in1); in mxl301rf_get_rf_strength() 90 ret = reg_read(state, 0x19, &rf_in2); in mxl301rf_get_rf_strength() 92 ret = reg_read(state, 0xd6, &rf_off1); in mxl301rf_get_rf_strength() 94 ret = reg_read(state, 0xd7, &rf_off2); in mxl301rf_get_rf_strength()
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/linux/drivers/media/dvb-frontends/ |
H A D | tc90522.c | 66 static int reg_read(struct tc90522_state *state, u8 reg, u8 *val, u8 len) in reg_read() function 131 ret = reg_read(state, 0xc3, ®, 1); in tc90522s_read_status() 146 if (reg_read(state, 0xc5, ®, 1) < 0 || !(reg & 0x03)) in tc90522s_read_status() 159 ret = reg_read(state, 0x96, ®, 1); in tc90522t_read_status() 170 ret = reg_read(state, 0x80, ®, 1); in tc90522t_read_status() 210 ret = reg_read(state, 0xe6, val, 5); in tc90522s_get_frontend() 254 ret = reg_read(state, 0xbc, val, 2); in tc90522s_get_frontend() 285 ret = reg_read(state, 0xeb, val, 10); in tc90522s_get_frontend() 344 ret = reg_read(state, 0xb0, val, 1); in tc90522t_get_frontend() 351 ret = reg_read(state, 0xb2, val, 6); in tc90522t_get_frontend() [all …]
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/linux/drivers/net/dsa/ |
H A D | mv88e6060.c | 17 static int reg_read(struct mv88e6060_priv *priv, int addr, int reg) in reg_read() function 60 ret = reg_read(priv, REG_PORT(i), PORT_CONTROL); in mv88e6060_switch_reset() 82 ret = reg_read(priv, REG_GLOBAL, GLOBAL_STATUS); in mv88e6060_switch_reset() 234 return reg_read(priv, addr, regnum); in mv88e6060_phy_read() 258 ret = reg_read(priv, addr, PORT_STATUS); in mv88e6060_phylink_get_caps()
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/linux/sound/firewire/ |
H A D | isight.c | 295 static int reg_read(struct isight *isight, int offset, __be32 *value) in reg_read() function 486 err = reg_read(isight, REG_GAIN, &gain); in isight_gain_get() 515 err = reg_read(isight, REG_MUTE, &mute); in isight_mute_get() 555 err = reg_read(isight, REG_GAIN_RAW_START, &value); in isight_create_mixer() 560 err = reg_read(isight, REG_GAIN_RAW_END, &value); in isight_create_mixer() 568 err = reg_read(isight, REG_GAIN_DB_START, &value); in isight_create_mixer() 574 err = reg_read(isight, REG_GAIN_DB_END, &value); in isight_create_mixer()
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