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Searched refs:reg_ofs (Results 1 – 4 of 4) sorted by relevance

/linux/arch/arm/mach-bcm/
H A Dplatsmp-brcmstb.c132 const int reg_ofs = cpu_logical_map(cpu) * 8; in cpu_set_boot_addr() local
133 writel_relaxed(0, hif_cont_block + hif_cont_reg + reg_ofs); in cpu_set_boot_addr()
134 writel_relaxed(boot_addr, hif_cont_block + hif_cont_reg + 4 + reg_ofs); in cpu_set_boot_addr()
/linux/drivers/gpu/drm/imx/dcss/
H A Ddcss-ctxld.c333 u32 reg_ofs) in dcss_ctxld_write_irqsafe() argument
349 ctx[ctx_id][item_idx].ofs = reg_ofs; in dcss_ctxld_write_irqsafe()
354 u32 val, u32 reg_ofs) in dcss_ctxld_write() argument
357 dcss_ctxld_write_irqsafe(ctxld, ctx_id, val, reg_ofs); in dcss_ctxld_write()
H A Ddcss-dev.h116 u32 reg_ofs);
/linux/drivers/clk/
H A Dclk-cdce925.c214 u8 reg_ofs = data->index * CDCE925_OFFSET_PLL; in cdce925_pll_prepare() local
220 reg_ofs + CDCE925_PLL_MUX_OUTPUTS, 0x80, 0x80); in cdce925_pll_prepare()
249 reg_ofs + CDCE925_PLL_MULDIV + i, pll[i]); in cdce925_pll_prepare()
252 reg_ofs + CDCE925_PLL_MUX_OUTPUTS, 0x80, 0x00); in cdce925_pll_prepare()
261 u8 reg_ofs = data->index * CDCE925_OFFSET_PLL; in cdce925_pll_unprepare() local
264 reg_ofs + CDCE925_PLL_MUX_OUTPUTS, 0x80, 0x80); in cdce925_pll_unprepare()