Searched refs:reg_mem_engine (Results 1 – 7 of 7) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_gfx.c | 1365 uint32_t *hdp_flush_mask, uint32_t *reg_mem_engine) in amdgpu_gfx_get_hdp_flush_mask() argument 1368 if (!ring || !hdp_flush_mask || !reg_mem_engine) { in amdgpu_gfx_get_hdp_flush_mask() 1378 *reg_mem_engine = 1; /* pfp */ in amdgpu_gfx_get_hdp_flush_mask() 1382 *reg_mem_engine = 0; in amdgpu_gfx_get_hdp_flush_mask() 1386 *reg_mem_engine = 0; in amdgpu_gfx_get_hdp_flush_mask() 1390 *reg_mem_engine = 0; in amdgpu_gfx_get_hdp_flush_mask()
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| H A D | gfx_v8_0.c | 5133 uint32_t *ref_and_mask, uint32_t *reg_mem_engine) in gfx_v8_0_get_hdp_flush_mask() argument 5135 if (!ring || !ref_and_mask || !reg_mem_engine) { in gfx_v8_0_get_hdp_flush_mask() 5152 *reg_mem_engine = 0; in gfx_v8_0_get_hdp_flush_mask() 5155 *reg_mem_engine = WAIT_REG_MEM_ENGINE(1); /* pfp */ in gfx_v8_0_get_hdp_flush_mask() 5947 u32 ref_and_mask, reg_mem_engine; in gfx_v8_0_ring_emit_hdp_flush() local 5955 adev->gfx.funcs->get_hdp_flush_mask(ring, &ref_and_mask, ®_mem_engine); in gfx_v8_0_ring_emit_hdp_flush() 5959 reg_mem_engine)); in gfx_v8_0_ring_emit_hdp_flush()
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| H A D | gfx_v9_4_3.c | 2936 u32 ref_and_mask, reg_mem_engine; in gfx_v9_4_3_ring_emit_hdp_flush() local 2943 adev->gfx.funcs->get_hdp_flush_mask(ring, &ref_and_mask, ®_mem_engine); in gfx_v9_4_3_ring_emit_hdp_flush() 2944 gfx_v9_4_3_wait_reg_mem(ring, reg_mem_engine, 0, 1, in gfx_v9_4_3_ring_emit_hdp_flush()
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| H A D | gfx_v12_0.c | 4509 u32 ref_and_mask, reg_mem_engine; in gfx_v12_0_ring_emit_hdp_flush() local 4516 adev->gfx.funcs->get_hdp_flush_mask(ring, &ref_and_mask, ®_mem_engine); in gfx_v12_0_ring_emit_hdp_flush() 4517 gfx_v12_0_wait_reg_mem(ring, reg_mem_engine, 0, 1, in gfx_v12_0_ring_emit_hdp_flush()
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| H A D | gfx_v9_0.c | 5436 u32 ref_and_mask, reg_mem_engine; in gfx_v9_0_ring_emit_hdp_flush() local 5443 adev->gfx.funcs->get_hdp_flush_mask(ring, &ref_and_mask, ®_mem_engine); in gfx_v9_0_ring_emit_hdp_flush() 5444 gfx_v9_0_wait_reg_mem(ring, reg_mem_engine, 0, 1, in gfx_v9_0_ring_emit_hdp_flush()
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| H A D | gfx_v11_0.c | 5993 u32 ref_and_mask, reg_mem_engine; in gfx_v11_0_ring_emit_hdp_flush() local 6000 adev->gfx.funcs->get_hdp_flush_mask(ring, &ref_and_mask, ®_mem_engine); in gfx_v11_0_ring_emit_hdp_flush() 6001 gfx_v11_0_wait_reg_mem(ring, reg_mem_engine, 0, 1, in gfx_v11_0_ring_emit_hdp_flush()
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| H A D | gfx_v10_0.c | 8635 u32 ref_and_mask, reg_mem_engine; in gfx_v10_0_ring_emit_hdp_flush() local 8642 adev->gfx.funcs->get_hdp_flush_mask(ring, &ref_and_mask, ®_mem_engine); in gfx_v10_0_ring_emit_hdp_flush() 8643 gfx_v10_0_wait_reg_mem(ring, reg_mem_engine, 0, 1, in gfx_v10_0_ring_emit_hdp_flush()
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