Searched refs:reg_ctrl2 (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/net/can/flexcan/ |
| H A D | flexcan-core.c | 1241 u32 reg_fdcbt, reg_ctrl2; in flexcan_set_bittiming_cbt() local
1277 reg_ctrl2 = priv->read(®s->ctrl2); in flexcan_set_bittiming_cbt()
1278 reg_ctrl2 &= ~FLEXCAN_CTRL2_ISOCANFDEN; in flexcan_set_bittiming_cbt()
1280 reg_ctrl2 |= FLEXCAN_CTRL2_ISOCANFDEN; in flexcan_set_bittiming_cbt()
1282 netdev_dbg(dev, "writing ctrl2=0x%08x\n", reg_ctrl2); in flexcan_set_bittiming_cbt()
1283 priv->write(reg_ctrl2, ®s->ctrl2); in flexcan_set_bittiming_cbt()
1346 u32 reg_ctrl2; in flexcan_ram_init() local
1356 reg_ctrl2 = priv->read(®s->ctrl2); in flexcan_ram_init()
1357 reg_ctrl2 |= FLEXCAN_CTRL2_WRMFRZ; in flexcan_ram_init()
1358 priv->write(reg_ctrl2, ®s->ctrl2); in flexcan_ram_init()
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| /linux/drivers/gpu/drm/msm/dsi/ |
| H A D | dsi_host.c | 852 u32 reg, reg_ctrl, reg_ctrl2; in dsi_update_dsc_timing() local
895 reg_ctrl2 = dsi_read(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL2); in dsi_update_dsc_timing()
900 reg_ctrl2 &= ~DSI_COMMAND_COMPRESSION_MODE_CTRL2_STREAM0_SLICE_WIDTH__MASK; in dsi_update_dsc_timing()
901 reg_ctrl2 |= DSI_COMMAND_COMPRESSION_MODE_CTRL2_STREAM0_SLICE_WIDTH(dsc->slice_chunk_size); in dsi_update_dsc_timing()
904 dsi_write(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL2, reg_ctrl2); in dsi_update_dsc_timing()
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