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Searched refs:reg_bit (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/net/ipa/
H A Dipa_table.c367 val = reg_bit(reg, IPV6_ROUTER_HASH); in ipa_table_hash_flush()
368 val |= reg_bit(reg, IPV6_FILTER_HASH); in ipa_table_hash_flush()
369 val |= reg_bit(reg, IPV4_ROUTER_HASH); in ipa_table_hash_flush()
370 val |= reg_bit(reg, IPV4_FILTER_HASH); in ipa_table_hash_flush()
375 val = reg_bit(reg, ROUTER_CACHE); in ipa_table_hash_flush()
376 val |= reg_bit(reg, FILTER_CACHE); in ipa_table_hash_flush()
H A Dipa_endpoint.c470 mask = reg_bit(reg, field_id); in ipa_endpoint_init_ctrl()
814 val |= reg_bit(reg, HDR_OFST_PKT_SIZE_VALID); in ipa_endpoint_init_hdr()
818 val |= reg_bit(reg, HDR_OFST_METADATA_VALID); in ipa_endpoint_init_hdr()
840 val |= reg_bit(reg, HDR_ENDIANNESS); /* big endian */ in ipa_endpoint_init_hdr_ext()
850 val |= reg_bit(reg, HDR_TOTAL_LEN_OR_PAD_VALID); in ipa_endpoint_init_hdr_ext()
852 val |= reg_bit(reg, HDR_PAYLOAD_LEN_INC_PADDING); in ipa_endpoint_init_hdr_ext()
1025 val |= reg_bit(reg, SW_EOF_ACTIVE); in ipa_endpoint_init_aggr()
1136 val = enable ? reg_bit(reg, HOL_BLOCK_EN) : 0; in ipa_endpoint_init_hol_block_en()
1281 val |= reg_bit(reg, STATUS_EN); in ipa_endpoint_status()
1647 val |= reg_bit(reg, ROUTE_DEF_HDR_TABLE); in ipa_endpoint_default_route_set()
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H A Dreg.h83 static inline u32 reg_bit(const struct reg *reg, u32 field_id) in reg_bit() function
/linux/drivers/perf/arm_cspmu/
H A Darm_cspmu.c807 u32 reg_id, reg_bit, inten_off, cnten_off; in arm_cspmu_enable_counter() local
810 reg_bit = COUNTER_TO_SET_CLR_BIT(idx); in arm_cspmu_enable_counter()
815 writel(BIT(reg_bit), cspmu->base0 + inten_off); in arm_cspmu_enable_counter()
816 writel(BIT(reg_bit), cspmu->base0 + cnten_off); in arm_cspmu_enable_counter()
821 u32 reg_id, reg_bit, inten_off, cnten_off; in arm_cspmu_disable_counter() local
824 reg_bit = COUNTER_TO_SET_CLR_BIT(idx); in arm_cspmu_disable_counter()
829 writel(BIT(reg_bit), cspmu->base0 + cnten_off); in arm_cspmu_disable_counter()
830 writel(BIT(reg_bit), cspmu->base0 + inten_off); in arm_cspmu_disable_counter()
/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_main.c3902 u32 val, reg, reg_bit; in hclge_reset_wait() local
3908 reg_bit = HCLGE_IMP_RESET_BIT; in hclge_reset_wait()
3912 reg_bit = HCLGE_GLOBAL_RESET_BIT; in hclge_reset_wait()
3916 reg_bit = HCLGE_FUN_RST_ING_B; in hclge_reset_wait()
3926 while (hnae3_get_bit(val, reg_bit) && cnt < HCLGE_RESET_WAIT_CNT) { in hclge_reset_wait()