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Searched refs:regWBIF_SMU_WM_CONTROL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h1168 #define regWBIF_SMU_WM_CONTROL macro
H A Ddcn_3_1_5_offset.h1314 #define regWBIF_SMU_WM_CONTROL macro
H A Ddcn_3_5_1_offset.h2182 #define regWBIF_SMU_WM_CONTROL macro
H A Ddcn_3_5_0_offset.h2203 #define regWBIF_SMU_WM_CONTROL macro
H A Ddcn_3_1_4_offset.h2444 #define regWBIF_SMU_WM_CONTROL macro
H A Ddcn_3_1_2_offset.h1551 #define regWBIF_SMU_WM_CONTROL macro
H A Ddcn_3_2_1_offset.h1168 #define regWBIF_SMU_WM_CONTROL macro
H A Ddcn_3_1_6_offset.h1767 #define regWBIF_SMU_WM_CONTROL macro
H A Ddcn_4_1_0_offset.h1178 #define regWBIF_SMU_WM_CONTROL macro