Home
last modified time | relevance | path

Searched refs:regVPG3_VPG_MEM_PWR (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h10565 #define regVPG3_VPG_MEM_PWR … macro
H A Ddcn_3_1_5_offset.h11132 #define regVPG3_VPG_MEM_PWR … macro
H A Ddcn_3_5_1_offset.h9020 #define regVPG3_VPG_MEM_PWR … macro
H A Ddcn_3_5_0_offset.h9041 #define regVPG3_VPG_MEM_PWR … macro
H A Ddcn_3_1_4_offset.h10184 #define regVPG3_VPG_MEM_PWR … macro
H A Ddcn_3_1_2_offset.h11387 #define regVPG3_VPG_MEM_PWR … macro
H A Ddcn_3_2_1_offset.h10564 #define regVPG3_VPG_MEM_PWR … macro
H A Ddcn_3_1_6_offset.h11611 #define regVPG3_VPG_MEM_PWR … macro
H A Ddcn_4_1_0_offset.h11019 #define regVPG3_VPG_MEM_PWR … macro