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Searched refs:regVPG2_VPG_ISRC1_2_ACCESS_CTRL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h10536 #define regVPG2_VPG_ISRC1_2_ACCESS_CTRL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h11103 #define regVPG2_VPG_ISRC1_2_ACCESS_CTRL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h8653 #define regVPG2_VPG_ISRC1_2_ACCESS_CTRL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h8674 #define regVPG2_VPG_ISRC1_2_ACCESS_CTRL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h9833 #define regVPG2_VPG_ISRC1_2_ACCESS_CTRL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h11358 #define regVPG2_VPG_ISRC1_2_ACCESS_CTRL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h10535 #define regVPG2_VPG_ISRC1_2_ACCESS_CTRL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h11582 #define regVPG2_VPG_ISRC1_2_ACCESS_CTRL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h10990 #define regVPG2_VPG_ISRC1_2_ACCESS_CTRL_BASE_IDX … macro