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Searched refs:regVCN_MES_DC_BASE_HI (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dumsch_mm_v4_0.c125 WREG32_SOC15_UMSCH(regVCN_MES_DC_BASE_HI, upper_32_bits(data)); in umsch_mm_v4_0_load_microcode()
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_5_0_0_offset.h1562 #define regVCN_MES_DC_BASE_HI … macro
H A Dvcn_4_0_5_offset.h1737 #define regVCN_MES_DC_BASE_HI … macro
H A Dvcn_4_0_0_offset.h1969 #define regVCN_MES_DC_BASE_HI … macro