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Searched refs:regVCN_MES_DC_APERTURE3_MASK_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_5_0_0_offset.h1469 #define regVCN_MES_DC_APERTURE3_MASK_BASE_IDX … macro
H A Dvcn_4_0_5_offset.h1644 #define regVCN_MES_DC_APERTURE3_MASK_BASE_IDX … macro
H A Dvcn_4_0_0_offset.h1875 #define regVCN_MES_DC_APERTURE3_MASK_BASE_IDX … macro