Searched refs:regUVD_VCPU_NONCACHE_SIZE0 (Results 1 – 9 of 9) sorted by relevance
/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | vcn_v4_0_3.c | 439 VCN, vcn_inst, regUVD_VCPU_NONCACHE_SIZE0, in vcn_v4_0_3_mc_resume() 547 VCN, 0, regUVD_VCPU_NONCACHE_SIZE0), in vcn_v4_0_3_mc_resume_dpg_mode() 1020 regUVD_VCPU_NONCACHE_SIZE0), in vcn_v4_0_3_start_sriov()
|
H A D | vcn_v4_0.c | 470 WREG32_SOC15(VCN, inst, regUVD_VCPU_NONCACHE_SIZE0, in vcn_v4_0_mc_resume() 573 VCN, inst_idx, regUVD_VCPU_NONCACHE_SIZE0), in vcn_v4_0_mc_resume_dpg_mode() 1435 regUVD_VCPU_NONCACHE_SIZE0), in vcn_v4_0_start_sriov()
|
H A D | vcn_v5_0_0.c | 382 WREG32_SOC15(VCN, inst, regUVD_VCPU_NONCACHE_SIZE0, in vcn_v5_0_0_mc_resume() 486 VCN, inst_idx, regUVD_VCPU_NONCACHE_SIZE0), in vcn_v5_0_0_mc_resume_dpg_mode()
|
H A D | vcn_v4_0_5.c | 418 WREG32_SOC15(VCN, inst, regUVD_VCPU_NONCACHE_SIZE0, in vcn_v4_0_5_mc_resume() 527 VCN, inst_idx, regUVD_VCPU_NONCACHE_SIZE0), in vcn_v4_0_5_mc_resume_dpg_mode()
|
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
H A D | vcn_2_6_0_offset.h | 68 #define regUVD_VCPU_NONCACHE_SIZE0 … macro
|
H A D | vcn_5_0_0_offset.h | 406 #define regUVD_VCPU_NONCACHE_SIZE0 … macro
|
H A D | vcn_4_0_5_offset.h | 399 #define regUVD_VCPU_NONCACHE_SIZE0 … macro
|
H A D | vcn_4_0_0_offset.h | 416 #define regUVD_VCPU_NONCACHE_SIZE0 … macro
|
H A D | vcn_4_0_3_offset.h | 418 #define regUVD_VCPU_NONCACHE_SIZE0 … macro
|