Searched refs:regUVD_RB_SIZE3 (Results 1 – 9 of 9) sorted by relevance
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
H A D | vcn_2_6_0_offset.h | 1336 #define regUVD_RB_SIZE3 … macro
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H A D | vcn_5_0_0_offset.h | 200 #define regUVD_RB_SIZE3 … macro
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H A D | vcn_4_0_5_offset.h | 209 #define regUVD_RB_SIZE3 … macro
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H A D | vcn_4_0_0_offset.h | 222 #define regUVD_RB_SIZE3 … macro
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H A D | vcn_4_0_3_offset.h | 222 #define regUVD_RB_SIZE3 … macro
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/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | vcn_v5_0_0.c | 66 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_SIZE3),
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H A D | vcn_v4_0_5.c | 81 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_SIZE3),
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H A D | vcn_v4_0_3.c | 74 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_SIZE3),
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H A D | vcn_v4_0.c | 81 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_SIZE3),
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