Searched refs:regUVD_RB_BASE_LO3 (Results 1 – 9 of 9) sorted by relevance
| /linux/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_2_6_0_offset.h | 1332 #define regUVD_RB_BASE_LO3 … macro
|
| H A D | vcn_5_0_0_offset.h | 196 #define regUVD_RB_BASE_LO3 … macro
|
| H A D | vcn_4_0_5_offset.h | 205 #define regUVD_RB_BASE_LO3 … macro
|
| H A D | vcn_4_0_0_offset.h | 218 #define regUVD_RB_BASE_LO3 … macro
|
| H A D | vcn_4_0_3_offset.h | 218 #define regUVD_RB_BASE_LO3 … macro
|
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vcn_v5_0_0.c | 53 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_BASE_LO3),
|
| H A D | vcn_v4_0_5.c | 68 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_BASE_LO3),
|
| H A D | vcn_v4_0_3.c | 61 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_BASE_LO3),
|
| H A D | vcn_v4_0.c | 68 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_BASE_LO3),
|