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Searched refs:regUVD_RAS_MMSCH_FATAL_ERROR_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_6_0_offset.h1163 #define regUVD_RAS_MMSCH_FATAL_ERROR_BASE_IDX … macro
H A Dvcn_4_0_0_offset.h1251 #define regUVD_RAS_MMSCH_FATAL_ERROR_BASE_IDX … macro