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Searched refs:regUVD_PGFSM_CONFIG (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Djpeg_v4_0.c307 WREG32(SOC15_REG_OFFSET(JPEG, 0, regUVD_PGFSM_CONFIG), data); in jpeg_v4_0_disable_static_power_gating()
342 WREG32(SOC15_REG_OFFSET(JPEG, 0, regUVD_PGFSM_CONFIG), data); in jpeg_v4_0_enable_static_power_gating()
H A Dvcn_v4_0.c83 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_PGFSM_CONFIG),
609 WREG32_SOC15(VCN, inst, regUVD_PGFSM_CONFIG, data); in vcn_v4_0_disable_static_power_gating()
631 WREG32_SOC15(VCN, inst, regUVD_PGFSM_CONFIG, data); in vcn_v4_0_disable_static_power_gating()
679 WREG32_SOC15(VCN, inst, regUVD_PGFSM_CONFIG, data); in vcn_v4_0_enable_static_power_gating()
H A Djpeg_v4_0_3.c487 WREG32_SOC15(JPEG, jpeg_inst, regUVD_PGFSM_CONFIG, in jpeg_v4_0_3_start()
586 WREG32_SOC15(JPEG, jpeg_inst, regUVD_PGFSM_CONFIG, in jpeg_v4_0_3_stop()
H A Dvcn_v4_0_5.c83 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_PGFSM_CONFIG),
H A Dvcn_v4_0_3.c76 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_PGFSM_CONFIG),
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_6_0_offset.h1066 #define regUVD_PGFSM_CONFIG macro
H A Dvcn_4_0_5_offset.h1115 #define regUVD_PGFSM_CONFIG macro
H A Dvcn_4_0_0_offset.h1146 #define regUVD_PGFSM_CONFIG macro
H A Dvcn_4_0_3_offset.h1062 #define regUVD_PGFSM_CONFIG macro