Home
last modified time | relevance | path

Searched refs:regUVD_MPC_PERF1_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_6_0_offset.h1057 #define regUVD_MPC_PERF1_BASE_IDX … macro
H A Dvcn_4_0_5_offset.h456 #define regUVD_MPC_PERF1_BASE_IDX … macro
H A Dvcn_4_0_0_offset.h473 #define regUVD_MPC_PERF1_BASE_IDX … macro
H A Dvcn_4_0_3_offset.h475 #define regUVD_MPC_PERF1_BASE_IDX … macro