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Searched refs:regUVD_LMI_STATUS (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v5_0_0.c970 r = SOC15_WAIT_ON_RREG(VCN, i, regUVD_LMI_STATUS, tmp, tmp); in vcn_v5_0_0_stop()
980 r = SOC15_WAIT_ON_RREG(VCN, i, regUVD_LMI_STATUS, tmp, tmp); in vcn_v5_0_0_stop()
H A Dvcn_v4_0_5.c1236 r = SOC15_WAIT_ON_RREG(VCN, i, regUVD_LMI_STATUS, tmp, tmp); in vcn_v4_0_5_stop()
1246 r = SOC15_WAIT_ON_RREG(VCN, i, regUVD_LMI_STATUS, tmp, tmp); in vcn_v4_0_5_stop()
H A Dvcn_v4_0_3.c1324 r = SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_LMI_STATUS, tmp, in vcn_v4_0_3_stop()
1335 r = SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_LMI_STATUS, tmp, in vcn_v4_0_3_stop()
H A Dvcn_v4_0.c1573 r = SOC15_WAIT_ON_RREG(VCN, i, regUVD_LMI_STATUS, tmp, tmp); in vcn_v4_0_stop()
1583 r = SOC15_WAIT_ON_RREG(VCN, i, regUVD_LMI_STATUS, tmp, tmp); in vcn_v4_0_stop()
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_6_0_offset.h422 #define regUVD_LMI_STATUS … macro
H A Dvcn_5_0_0_offset.h638 #define regUVD_LMI_STATUS … macro
H A Dvcn_4_0_5_offset.h725 #define regUVD_LMI_STATUS … macro
H A Dvcn_4_0_0_offset.h750 #define regUVD_LMI_STATUS … macro
H A Dvcn_4_0_3_offset.h752 #define regUVD_LMI_STATUS … macro