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Searched refs:regUVD_DPG_LMA_MASK (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_jpeg.h68 regUVD_DPG_LMA_MASK, 0xFFFFFFFF); \
80 regUVD_DPG_LMA_MASK, 0xFFFFFFFF); \
H A Dvcn_v5_0_0.c70 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_DPG_LMA_MASK),
H A Dvcn_v4_0_5.c87 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_DPG_LMA_MASK),
H A Dvcn_v4_0_3.c80 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_DPG_LMA_MASK),
H A Dvcn_v4_0.c87 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_DPG_LMA_MASK),
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_6_0_offset.h1084 #define regUVD_DPG_LMA_MASK macro
H A Dvcn_5_0_0_offset.h964 #define regUVD_DPG_LMA_MASK macro
H A Dvcn_4_0_5_offset.h1137 #define regUVD_DPG_LMA_MASK macro
H A Dvcn_4_0_0_offset.h1164 #define regUVD_DPG_LMA_MASK macro
H A Dvcn_4_0_3_offset.h1088 #define regUVD_DPG_LMA_MASK macro