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Searched refs:regUNIPHYA_LINK_CNTL (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6238 #define regUNIPHYA_LINK_CNTL … macro
H A Ddpcs_4_2_3_offset.h607 #define regUNIPHYA_LINK_CNTL … macro
H A Ddpcs_4_2_2_offset.h571 #define regUNIPHYA_LINK_CNTL … macro
H A Ddpcs_4_2_0_offset.h574 #define regUNIPHYA_LINK_CNTL … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_5_offset.h11528 #define regUNIPHYA_LINK_CNTL … macro
H A Ddcn_3_5_1_offset.h9758 #define regUNIPHYA_LINK_CNTL … macro
H A Ddcn_3_5_0_offset.h9779 #define regUNIPHYA_LINK_CNTL … macro
H A Ddcn_3_1_4_offset.h10890 #define regUNIPHYA_LINK_CNTL … macro
H A Ddcn_3_1_2_offset.h11783 #define regUNIPHYA_LINK_CNTL … macro
H A Ddcn_3_2_1_offset.h10936 #define regUNIPHYA_LINK_CNTL … macro
H A Ddcn_3_1_6_offset.h12011 #define regUNIPHYA_LINK_CNTL … macro
H A Ddcn_4_1_0_offset.h11179 #define regUNIPHYA_LINK_CNTL … macro