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Searched refs:regSRE_SUVD_CGC_CTRL_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_5_0_0_offset.h127 #define regSRE_SUVD_CGC_CTRL_BASE_IDX … macro
H A Dvcn_4_0_5_offset.h144 #define regSRE_SUVD_CGC_CTRL_BASE_IDX … macro
H A Dvcn_4_0_0_offset.h145 #define regSRE_SUVD_CGC_CTRL_BASE_IDX … macro
H A Dvcn_4_0_3_offset.h145 #define regSRE_SUVD_CGC_CTRL_BASE_IDX … macro