Searched refs:regSQ_IND_DATA (Results 1 – 9 of 9) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v9_4_3.c | 722 return RREG32_SOC15(GC, GET_INST(GC, xcc_id), regSQ_IND_DATA); in wave_read_ind()
737 *(out++) = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regSQ_IND_DATA); in wave_read_regs()
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| H A D | gfx_v12_1.c | 759 return RREG32_SOC15(GC, GET_INST(GC, xcc_id), regSQ_IND_DATA); in wave_read_ind()
773 *(out++) = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regSQ_IND_DATA); in wave_read_regs()
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| H A D | gfx_v12_0.c | 829 return RREG32_SOC15(GC, 0, regSQ_IND_DATA); in wave_read_ind()
842 *(out++) = RREG32_SOC15(GC, 0, regSQ_IND_DATA); in wave_read_regs()
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| H A D | gfx_v11_0.c | 1000 return RREG32_SOC15(GC, 0, regSQ_IND_DATA); in wave_read_ind()
1013 *(out++) = RREG32_SOC15(GC, 0, regSQ_IND_DATA); in wave_read_regs()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_4_3_offset.h | 498 #define regSQ_IND_DATA … macro
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| H A D | gc_9_4_2_offset.h | 6188 #define regSQ_IND_DATA … macro
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| H A D | gc_12_0_0_offset.h | 7313 #define regSQ_IND_DATA … macro
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| H A D | gc_11_0_3_offset.h | 2234 #define regSQ_IND_DATA … macro
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| H A D | gc_11_0_0_offset.h | 2168 #define regSQ_IND_DATA … macro
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