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Searched refs:regSQG_GL1H_STATUS_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h1224 #define regSQG_GL1H_STATUS_BASE_IDX macro
H A Dgc_11_0_3_offset.h2197 #define regSQG_GL1H_STATUS_BASE_IDX macro
H A Dgc_11_0_0_offset.h2131 #define regSQG_GL1H_STATUS_BASE_IDX macro