Home
last modified time | relevance | path

Searched refs:regSDMA0_UTCL1_RD_STATUS_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_offset.h110 #define regSDMA0_UTCL1_RD_STATUS_BASE_IDX … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h109 #define regSDMA0_UTCL1_RD_STATUS_BASE_IDX … macro
H A Dgc_12_0_0_offset.h101 #define regSDMA0_UTCL1_RD_STATUS_BASE_IDX … macro
H A Dgc_11_0_3_offset.h107 #define regSDMA0_UTCL1_RD_STATUS_BASE_IDX … macro
H A Dgc_11_0_0_offset.h107 #define regSDMA0_UTCL1_RD_STATUS_BASE_IDX … macro