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Searched refs:regSDMA0_UCODE_SELFLOAD_CONTROL (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dimu_v11_0.c242 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regSDMA0_UCODE_SELFLOAD_CONTROL, 0x00000210, 0),
311 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regSDMA0_UCODE_SELFLOAD_CONTROL, 0x00000210, 0),
H A Dimu_v11_0_3.c101 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regSDMA0_UCODE_SELFLOAD_CONTROL, 0x00000210, 0xe0000000),
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_3_offset.h1750 #define regSDMA0_UCODE_SELFLOAD_CONTROL macro
H A Dgc_11_0_0_offset.h1738 #define regSDMA0_UCODE_SELFLOAD_CONTROL macro