Home
last modified time | relevance | path

Searched refs:regSDMA0_QUEUE1_RB_WPTR_HI (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v7_0.c94 SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_RB_WPTR_HI),
H A Dsdma_v6_0.c94 SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_RB_WPTR_HI),
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h293 #define regSDMA0_QUEUE1_RB_WPTR_HI … macro
H A Dgc_12_0_0_offset.h288 #define regSDMA0_QUEUE1_RB_WPTR_HI … macro
H A Dgc_11_0_3_offset.h294 #define regSDMA0_QUEUE1_RB_WPTR_HI … macro
H A Dgc_11_0_0_offset.h288 #define regSDMA0_QUEUE1_RB_WPTR_HI … macro