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Searched refs:regSDMA0_QUEUE1_RB_CNTL (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v12.c97 + queue_id * (regSDMA0_QUEUE1_RB_CNTL - regSDMA0_QUEUE0_RB_CNTL); in get_sdma_rlc_reg_offset()
H A Damdgpu_amdkfd_gfx_v11.c146 + queue_id * (regSDMA0_QUEUE1_RB_CNTL - regSDMA0_QUEUE0_RB_CNTL); in get_sdma_rlc_reg_offset()
H A Dsdma_v7_0.c90 SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_RB_CNTL),
H A Dsdma_v6_0.c90 SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_RB_CNTL),
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h281 #define regSDMA0_QUEUE1_RB_CNTL … macro
H A Dgc_12_0_0_offset.h276 #define regSDMA0_QUEUE1_RB_CNTL … macro
H A Dgc_11_0_3_offset.h282 #define regSDMA0_QUEUE1_RB_CNTL … macro
H A Dgc_11_0_0_offset.h276 #define regSDMA0_QUEUE1_RB_CNTL … macro