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Searched refs:regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_HI (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v7_0.c539 WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_HI), in sdma_v7_0_gfx_resume()
H A Dsdma_v6_0.c523 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_HI), in sdma_v6_0_gfx_resume_instance()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h247 #define regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_HI … macro
H A Dgc_12_0_0_offset.h232 #define regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_HI … macro
H A Dgc_11_0_3_offset.h248 #define regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_HI … macro
H A Dgc_11_0_0_offset.h242 #define regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_HI … macro