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Searched refs:regSDMA0_QUEUE0_RB_BASE (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v11.c398 WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_BASE, m->sdmax_rlcx_rb_base); in hqd_sdma_load_v11()
H A Dsdma_v7_0.c555 …WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_BASE), ring->gpu_addr >> … in sdma_v7_0_gfx_resume()
H A Dsdma_v6_0.c536 …WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_BASE), ring->gpu_addr >> … in sdma_v6_0_gfx_resume_instance()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h197 #define regSDMA0_QUEUE0_RB_BASE … macro
H A Dgc_12_0_0_offset.h184 #define regSDMA0_QUEUE0_RB_BASE … macro
H A Dgc_11_0_3_offset.h198 #define regSDMA0_QUEUE0_RB_BASE … macro
H A Dgc_11_0_0_offset.h192 #define regSDMA0_QUEUE0_RB_BASE … macro